isl22102 Intersil Corporation, isl22102 Datasheet
isl22102
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isl22102 Summary of contents
Page 1
... When powered up, the wipers are reset to the -20dB position. In addition to the ISL22102’s low noise design, the ISL22102 also contains a zero-crossing detection circuitry to further minimize click and pop noise during volume transition. ...
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... RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Block Diagram LEFT_IN 32-TAP LOG 18.5k VB 32-TAP LOG 18.5k RIGHT_IN VCC UP 2 ISL22102 TOTAL RESISTANCE TEMP RANGE (kΩ) 18.5 18 AUDIO DETECT AND DELAY CONTROL UNIT DN MUTE ...
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... Programming bit (MSB) input for delayed FLAG low output. FLAG Output signal indicates audio input detection. SB Active low Standby Mode input with internal pull-up. UP Active low volume increment input with internal pull-up. Exposed Die Pad internaly connected to GND ISL22102 (20 LD TSSOP) TOP VIEW FLAG ...
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... Power-up Attenuation (Default Wiper Position at Tap 10) TC Ratiometric Temperature Coefficient V (Note 7) 4 ISL22102 Thermal Information Thermal Resistance (Typical) 20 Lead TSSOP (Note Lead QFN (Notes Maximum Junction Temperature (Plastic Package +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature Range (Industrial -40° ...
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... DB t Lockout Time after Debounce Time, when any New Command will be Ignored LOCK (Note 7) t FLAG Delay Time from when Audio Input is Detected to FLAG Asserted HIGH FLAG_HIGH (Note 7) 5 ISL22102 TEST CONDITIONS AVCC = 5.5V 0mA, I BIAS OUT both channels AVCC = 5.5V 0mA BIAS All Inputs = 5 ...
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... Timing Diagrams ZAWS NOTE these timing diagrams refers to the minimum incremental change of the output (wiper) voltage. 6 ISL22102 PARAMETER = +25° LOW GAP t WRPO W FIGURE 1. DIGITAL INPUT TIMING AUTO INCREMENT 4Hz RATE MI (Note 8) ...
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... The active low SB input allows totally disconnect DCP arrays from their LEFT_IN and RIGHT_IN pins, and move both wipers to position closest to VB pin (as shown in Figure 3). It also sets ISL22102 in low power Standby mode. When SB will be released, the both wipers will be set at position they have prior Standby. ...
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... Device Operation There are four sections in the ISL22102: the input control, counter and decode section, two resistor arrays with buffered wiper outputs, reference voltage generator of VB output, and audio detection block with programmable delay FLAG output. The input control section operates just like an up/down counter ...
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... There is a 40ms lockout time after any of the UP MUTE button has been validly pushed, when any new command is ignored. If two or more buttons are pressed simultaneously, all commands are ignored upon release of ALL buttons. 9 ISL22102 ATTENUATION -56dB -60dB -64dB -68dB -72dB MUTE (-90dB) FN6788 ...
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... Typical Application Diagram 1µF *FLAG LOW OUTPUT DELAY IS 240s 10 ISL22102 VCC AVCC LEFT_IN LEFT_OUT RIGHT_IN RIGHT_OUT VB V FLAG HPA 100nF HPB MUTE D0 TO POWER AMPLIFIER VCC* FN6788.0 September 29, 2008 ...
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... L20.4x4C 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 11/06 4.00 6 PIN 1 INDEX AREA 0.15 (4X) TOP VIEW ( 3. 8 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 11 ISL22102 16X 20X 0.4 ± 0.10 BOTTOM VIEW BOTTOM VIEW ± 20X 20X 20X NOTES: 1 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 12 ISL22102 M20.173 M B ...