isl29003 Intersil Corporation, isl29003 Datasheet - Page 6

• Manufacturer Part Number: isl29003
• Description: Light-to-digital Output Sensor With High Sensitivity, Gain Selection, Interrupt Function And I2c Interface
• Manufacturer: Intersil Corporation

d
Command Register 00(hex)
The Read/Write command register has five functions:
(1) Enable; Bit 7. This function either resets the ADC or
enables the ADC in normal operation. A logic 0 disables
ADC to reset-mode. A logic 1 enables adc to normal
operation.
(2) ADCPD; Bit 6. This function puts the device in a power
down mode. A logic 0 puts the device in normal operation. A
logic 1 powers down the device.
(3) Timing Mode; Bit 5. This function determines whether the
integration time is done internally or externally. In Internal
Timing Mode, integration time is determined by an internal
dual speed oscillator (f
counter inside the ADC. In External Timing Mode, integration
time is determined by the time between two consecutive
external-sync sync_iic pulse commands.
(4) Photodiode Select Mode; Bits 3 and 2. This function
controls the mux attached to the two photodiodes. At Mode1,
the mux directs the current of Diode1 to the ADC. At Mode2,
the mux directs the current of Diode2 only to the ADC.
b1xxx_xxxx
bx1xx_xxxx
ADDRESS
BIT 5
BIT 7
BIT 6
0
1
0
1
0
1
TABLE 2. WRITE ONLY REGISTERS
Internal Timing Mode. Integration time is internally
timed determined by f
clock cycles.
External Timing Mode. Integration time is externally
timed by the I
REGISTER
disable ADC-core to reset-mode (default)
enable ADC-core to normal operation
Normal operation (default)
Power Down
sync_iic
clar_int
NAME
TABLE 5. TIMING MODE
TABLE 3. ENABLE
TABLE 4. ADCPD
OSC
2
), and the n-bit (n = 4, 8, 12,16)
C host.
Writing a logic 1 to this address bit
ends the current adc-integration and
starts another. Used only with
External Timing Mode.
Writing a logic 1 to this address bit
clears the interrupt.
6
OPERATION
OPERATION
OPERATION
OSC
DESCRIPTION
, REXT, and number of
FUNCTIONS/
ISL29003
Mode3 is a sequential Mode1 and Mode2 with an internal
subtract function (Diode1 - Diode2).
*n = 4, 8, 12,16 depending on the number of clock cycles
function.
(5) Width; Bits 1 and 0. This function determines the number
of clock cycles per conversion. Changing the number of
clock cycles does more than just change the resolution of
the device. It also changes the integration time, which is the
period the device’s analog-to-digital (A/D) converter samples
the photodiode current signal for a lux measurement.
Control Register 01(hex)
The Read/Write control register has three functions:
(1) Interrupt flag; Bit 5. This is the status bit of the interrupt.
The bit is set to logic high when the interrupt thresholds have
been triggered, and logic low when not yet triggered. Writing
a logic low clears/resets the status bit.
(2) Range/Gain; Bits 3 and 2. The Full Scale Range can be
adjusted by an external resistor Rext and/or it can be
adjusted via I
has four possible values, Range(k) where k is 1 through 4.
Table 9 lists the possible values of Range(k) and the
resulting FSR for some typical value R
BITS 3:2
BITS 1:0
TABLE 6. PHOTODIODE SELECT MODE; BITS 2 AND 3
BIT 5
0:0
0:1
1:0
1:1
0:0
0:1
1:0
1:1
0
1
2
MODE1. ADC integrates or converts Diode1 only.
Current is converted to an n-bit unsigned data.*
MODE2. ADC integrates or coverts Diode2 only.
Current is converted to an n-bit unsigned data.*
MODE3. A sequential MODE1 then MODE2
operation. The difference current is an (n-1) signed
data.*
No operation.
C using the Gain/Range function. Gain/Range
2
2
2
2
Interrupt is cleared or not triggered yet
Interrupt is triggered
TABLE 8. INTERRUPT FLAG
16
12
8
4
= 256
= 16
= 65,536
= 4,096
TABLE 7. WIDTH
NUMBER OF CLOCK CYCLES
OPERATION
MODE
EXT
resistors.
October 8, 2007
FN7464.3