isl59911 Intersil Corporation, isl59911 Datasheet - Page 11

• Manufacturer Part Number: isl59911
• Description: 250mhz Triple Differential Receiver/ Equalizer With I 2c Interface
• Manufacturer: Intersil Corporation

Offset Calibration
Historically, programmable video equalizer ICs have had large
and varying offset voltages, often requiring external circuitry
and/or manual trim to reduce the offset to acceptable levels. The
ISL59911 improves upon this by adding an offset calibration
circuit that, when triggered by setting bit 0 of I
shorts the inputs together internally, compares the R
and B
voltages and uses a DAC with a successive-approximation
technique to minimize the delta between them (see Figure 12).
When the ISL59911 is first powered up, the offset error is
undefined until an offset calibration is performed. The output
offset voltage of the ISL59911 also varies as the filter and gain
settings are adjusted. To minimize offset, always perform an
offset calibration after finalizing the filter and gain settings.
An offset calibration only takes about 3μs, so offset calibrations
can be performed after every register write without adding
significant time to the adjustment process. This minimizes offset
throughout the entire equalization adjustment procedure.
Output Signals
The R
75Ω video load in x1 gain mode or a 150Ω source-terminated
load (75Ω in series at source end [ISL59911 output pin], plus
75Ω termination to ground at receive end) in x2 mode. If the
output of the ISL59911 is going directly into an ISL59920 or
V
V
Length
IN
IN
100
125
150
175
200
225
250
275
300
(m)
25
50
75
+
-
0
FIGURE 12. OFFSET CALIBRATION (ONE CHANNEL SHOWN)
OUT
OUT
, G
voltages to their corresponding R
OUT
0x00
0x20
0x25
0x49
0x69
0x89
0x92
0x96
0xB7
0xD7
0x24
0x97
0xF7
Reg
2
BUFFER
, and B
INPUT
TABLE 1. Cat 5 LOOK-UP TABLE
OUT
EQ AND
0x00
0x11
0x22
0x33
0x44
0x55
0x75
0x86
0x96
0xA7
0xB8
0xC9
0xEA
GAIN
Reg
3
outputs can drive either a standard
11
0x00
0x10
0x21
0x31
0x42
0x53
0x62
0x72
0x82
0x93
0xB2
0xC3
0xD2
Reg
LOGIC
4
DAC
SAR
REF
COMPARATOR
0x00
0x00
0x02
0x02
0x04
0x06
0x08
0x09
0x0A
0x0C
0x01
0x01
0x01
2
Reg
, G
5
C register 0x0C,
OUTPUT
BUFFER
REF
, and B
OUT
, G
0x40
0x40
0x44
0x44
0x48
0x48
0x4C
0x4C
0x50
0x50
0x54
0x54
0x58
Reg
6-8
ISL59911
OUT
V
REF
V
REF
OUT
,
similar delay line, termination to ground is not necessary,
however, a ~75Ω series resistor at each output pin will help
isolate the outputs from the PCB trace capacitance, improving
the flatness of the frequency response.
When ENABLE is low, the R
in a high-impedance state, allowing multiple ISL59911 devices
to be configured as a multiplexer by paralleling their outputs and
using ENABLE to select the active RGB channel.
Common Mode and H
In addition to the incoming differential video signals, the
ISL59911 also processes the common mode voltage on the
differential inputs and can output the signal in one of two ways
(as determined by the Output Configuration bit in register 0x01).
When the Output Configuration bit is set to 0 (the default), the
common mode input voltages are sent to comparators that
decode the voltage into H
the EL4543/ISL59311 standard encoding scheme shown in
Figure 13 and in Table 2 on page 11. The H
on the HS
output pin is held at a logic low (0v).
To minimize noise coupling into the analog section from the sync
output drivers, the HS
drive, and should be buffered by 74HC04 or similar CMOS
buffers, as shown in Figure 1, before driving any significant loads
(such as a VGA cable).
When the Output Configuration bit is set to 1, buffered versions
of the three common mode input voltages are available on the
R
available allows for custom encoding schemes and/or
transmission of analog signals on the video signals’ common
mode.
CM
RED CM
, G
2.5V
3.0V
2.0V
2.5V
2.0V
2.5V
2.5V
3.0V
3.0V
2.0V
3.0V
2.0V
0V
CM
0V
OUT
, and B
FIGURE 13. H AND V SYNC SIGNAL ENCODING
/R
CM
GREEN CM
TABLE 2. H AND V SYNC DECODING
CM
3.0V
2.0V
3.0V
2.0V
pin, the V
pins. Making the raw common mode signal
OUT
TIME (0.5ms/DIV)
SYNC
and VS
OUT
SYNC
SYNC
BLUE CM
, G
and V
OUT
2.0V
2.5V
2.5V
3.0V
OUT
signal on VS
outputs have limited current
SYNC
, and B
/V
SYNC
signals according to
SYNC
OUT
H
High
High
Low
Low
OUT
SYNC
outputs are put
Outputs
signal appears
/G
September 2, 2011
CM
BLUE CM
GREEN CM
RED CM
V
H
SYNC
SYNC
. The B
V
FN7548.0
High
High
Low
Low
SYNC
CM