isl3873b Intersil Corporation, isl3873b Datasheet - Page 33

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isl3873b

Manufacturer Part Number
isl3873b
Description
Wireless Integrated Medium Access Controller With Baseband Processor
Manufacturer
Intersil Corporation
Datasheet

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Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bits 2:0
Bit 7
TX Antenna Mode.
0 = Disable diversity, set AntSel pin to value in bit 2.
1 = Enable diversity, set AntSel pin to antenna for which last valid received header CRC occurred.
Must be set to 0.
AGC freeze during packet.
0 = Disable (do not disable unless MAC can handle baseband processor aborting during MPDU reception).
1 = Enable.
CIR estimate/ Dot product clock control.
0 = on during acquisition.
1 = only on after detect.
ISI equalizer control.
0 = enable equalizer.
1 = disable equalizer.
ICI equalizer control.
0 = enable equalizer.
1 = disable equalizer.
MD_RDY control.
0 = After CRC16.
1 = After SFD.
Slot diversity mode control.
0 = disabled, Antenna diversity on for entire slot.
1 = enabled, Antenna diversity disabled for last half of slot - saves acquisition time, use in system where nodes are slot aligned.
Antenna choice for Receiver when single antenna acquisition is selected.
0 = Antenna select pin low.
1 = Antenna select pin high.
Single or dual antenna acquire.
0 = dual antenna for diversity acquisition.
1 = single antenna.
Continuous internal RX 22 and 44MHz clocks; (Only Reset active will stop).
0 = normal.
1 = continuous, overrides CR10 bit 6.
A/D input coupling.
0 = DC.
1 = AC (external bias network required).
Reserved.
Short Preamble test mode.
0 = use CR3 for short preamble.
1 = run TX and RX short preamble using preamble length in CR4.
CCA mode.
0 = normal (raw) mode CCA. CCA will immediately respond to changes in ED, CS1, and SQ1 as configured.
1 = Sampled mode CCA. CCA will update once per slot (20 s), will be valid at 18.7 s or 15.8 s as determined by CR9 bit 7.
Precursor value in CIR estimate.
All DAC and A/D clock source control.
0 = normal internal clocks.
1 = clock via SDI pin.
33
CONFIGURATION REGISTER 11 ADDRESS (16h) R/W RX-TX CONFIGURE
CONFIGURATION REGISTER 12 ADDRESS (18h) R/W A/D TEST MODES 1
CONFIGURATION REGISTER 10 ADDRESS (14h) R/W RX CONFIGURE
CONFIGURATION REGISTER 9 ADDRESS (12h) R/W TX CONFIGURE
ISL3873B

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