isl12020m Intersil Corporation, isl12020m Datasheet - Page 16

• Manufacturer Part Number: isl12020m
• Description: Real Time Clock With Embedded Crystal, ?5ppm Accuracy
• Manufacturer: Intersil Corporation

Battery Voltage Trip Voltage Register (PWR_VBAT)
This register controls the trip points for the two V
with levels set to approximately 85% and 75% of the nominal
battery level.
RESEAL BIT (RESEALB)
This is the Reseal bit for actively disconnecting V
the internal circuitry. Setting this bit allows the device to
disconnect the battery and eliminate standby current drain
while the device is unused. Once V
reset and the V
circuitry.
The application for this bit involves placing the chip on a
board with a battery and testing the board. Once the board is
tested and ready to ship, it is desirable to disconnect the
battery to keep it fresh until the board or unit is placed into
final use. Setting RESEALB = “1” initiates the battery
disconnect, and after V
again, the RESEAL bit is cleared to “0”.
BATTERY LEVEL MONITOR TRIP BITS (VB85TP<2:0>)
Three bits select the first alarm (85% of Nominal V
the battery voltage monitor. There are total of 7 levels that could
be selected for the first alarm. Any of the of levels could be
selected as the first alarm with no reference as to nominal
battery voltage level. See Table 8.
BATTERY LEVEL MONITOR TRIP BITS (VB75TP<2:0>)
Three bits select the second alarm (75% of Nominal V
level for the battery voltage monitor. There are total of 7 levels
that could be selected for the second alarm. Any of the of levels
could be selected as the second alarm with no reference as to
nominal Battery voltage level. See Table 9.
ADDR
0Ah
VB85Tp2
0
0
0
0
1
1
1
D
7
RESE
ALB
BAT
TABLE 8. VB85T ALARM LEVEL
VB85Tp1
6
pin is then connected to the internal
0
0
1
1
0
0
1
VB85
Tp2
5
DD
TABLE 7.
power is cycled down and up
VB85
Tp1
VB85Tp0
16
4
0
1
0
1
0
1
0
DD
VB85
Tp0
3
is powered up, this bit is
BATTERY ALARM
VB75
Tp2
2
TRIP LEVEL
BAT
2.125
2.295
2.550
2.805
3.060
4.250
4.675
BAT
BAT
VB75
Tp1
(V)
1
pin from
) level for
BAT
alarms,
VB75
Tp0
)
ISL12020M
0
Initial AT and DT setting Register (ITRO)
These bits are used to trim the initial error (at room
temperature) of the crystal. Both Digital Trimming (DT) and
Analog Trimming (AT) methods are available. The digital
trimming uses clock pulse skipping and insertion for
frequency adjustment. Analog trimming uses load
capacitance adjustment to pull the oscillator frequency. A
range of +62.5ppm to -61.5ppm is possible with combined
digital and analog trimming.
Initial values for the ITR0 register are preset internally and
recalled to RAM registers on power-up. These values can
be overwritten by the user although this is not
suggested as the resulting temperature compensation
performance will be compromised. Aging adjustment is
normally a few ppm and can be handled by writing to the
IATR section.
AGING AND INITIAL TRIM DIGITAL TRIMMING BITS
(IDTR0<1:0>)
These bits allow ±30.5ppm initial trimming range for the
crystal frequency. This is meant to be a coarse adjustment if
the range needed is outside that of the IATR control.
See Table 10. The IDTR0 register should only be changed
while the TSE (Temp Sense Enable) bit is “0”.
The ISL12020M has a preset Initial Digital Trimming value
corresponding to the crystal in the module. This value is
recalled on initial power-up and should never be changed for
best temperature compensation performance, although the
user may change this preset value to adjust for aging or
board mounting changes if so desired.
VB75Tp2
TABLE 9. BATTERY LEVEL MONITOR TRIP BITS
IDTR01
0
0
0
0
1
1
1
0
0
1
1
(VB75TP<2:0>)
TABLE 10. IDTR0 TRIMMING RANGE
VB75Tp1
IDTR00
0
0
1
1
0
0
1
0
1
0
1
VB75Tp0
Default/Disabled
+30.5ppm
0ppm
-30.5ppm
0
1
0
1
0
1
0
TRIMMING RANGE
BATTERY ALARM
TRIP LEVEL
1.875
2.025
2.250
2.475
2.700
3.750
4.125
January 15, 2009
(V)
FN6667.2