es6218a Jess Technology Group, es6218a Datasheet - Page 4

• Manufacturer Part Number: es6218a
• Description: Vibratto-s Automotive Dvd Processor Product Brief
• Manufacturer: Jess Technology Group

Table 1 ES6218A Pin Description (Continued)
4
Name
TSD0
SEL_PLL0
TSD1
SEL_PLL1
TSD2
TSD3
MCLK
TBCK
SPDIF_OUT
SEL_PLL3
SPDIF_IN
RSD
RWS
RBCK
CAMIN3
PIXIN3
XIN
XOUT
AVEE
AVSS
DMA[11:0]
DCAS#
DOE#
DSCK_EN
DWE#
DRAS#
DMBS0
DMBS1
DB[15:0]
DCS[1:0]#
DQM
DSCK
SAM0575-021805
77-82, 85-90, 93-96
Pin Numbers
53-58, 61-66
97,100
101
102
33
36
37
38
39
40
41
45
46
47
48
49
70
42
50
51
52
69
71
72
73
74
I/O
I/O
I/O
I/O
O
O
O
O
O
O
G
O
O
O
O
O
O
O
O
O
O
O
P
I
I
I
I
I
I
I
I
I
I
Definition
Audio transmit serial data output 0.
Refer to the description and matrix for SEL_PLL2 pin 32.
Audio transmit serial data output 1.
Refer to the description and matrix for SEL_PLL2 pin 32.
Audio transmit serial data output 2. This pin must be pulled down to VSS via a
4.7-k: resistor for proper operation.
Audio transmit serial data output 3.
Audio master clock for audio DAC.
Audio transmit bit clock. TBCK is an input during reset and subsequently is
programmed as an output via the AUDIOXMT register (addr 0x2000D00Ch, bit 4).
S/PDIF output.
Clock source select. Strapped to VCC or ground via 4.7-k: resistor; read only
during reset.
S/PDIF input.
Audio receive serial data.
Audio receive frame sync.
Audio receive bit clock.
Camera YUV 3.
CCIR656 input pixel 3.
27-MHz crystal input.
27-MHz crystal output.
Analog power for PLL.
Analog ground for PLL.
DRAM address bus.
DRAM column address strobe.
DRAM output enable.
DRAM clock enable.
DRAM write enable.
DRAM row address strobe.
DRAM bank select 0.
DRAM bank select 1.
DRAM data bus.
DRAM chip select.
Data input/output mask.
Output clock to DRAM.
SEL_PLL3
0
1
Crystal oscillator
Clock Source
DCLK input
ES6218A PIN DESCRIPTION
ES6218A PRODUCT BRIEF
ESS Technology, Inc.