sm1350 Nippon Precision Circuits Inc, (NPC), sm1350 Datasheet - Page 9

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sm1350

Manufacturer Part Number
sm1350
Description
High Tone Quality Melody Lsi
Manufacturer
Nippon Precision Circuits Inc, (NPC)
Datasheet

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S0 to S3 chattering prevention function
In binary select mode, S0 to S3 are sampled in sync with the 15.26 Hz clock during level-hold melody output.
The chatter prevention function compares the data sampled 65.5 ms after a data transition on S0 to S3 with the
data sampled 65.5 ms before the data transition. If the 2 data samples are the same, then the data transition is
considered invalid. However, if they are the not the same indicating a true transition has occurred, melody out-
put stops and only restarts again after 2 consecutive identical melody select data samples occur.
Note that except for the “Select change retrigger [No]” master slice option and binary select mode with level
hold output, the S0 to S3 chattering prevention circuit is disabled.
Initialization
When power on and ICN goes LOW, all pins and internal states are initialized to the states shown below. ICN
initialization has priority over all other inputs.
I
I
I
Output pins
• SP, SPN
• MSB, MSBN : V
• CT
• BUSYN
Serial melody counter
Reset to first melody (S0 to S3 all 0)
Oscillator circuit
Stopped
15.26Hz
S0 to S3
Melody
Output
#N
: Open
: V
: V
DD
SS
DD
65.5
ms
Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics.
#N
#N
Figure 3. S0 to S3 chattering prevention timing
65.5
ms
65.5
ms
SM1350 series
#M
#M
65.5
ms
65.5
ms
NIPPON PRECISION CIRCUITS INC.—9
65.5
ms
#S
#S

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