st2064b Sitronix Technology Corporation, st2064b Datasheet - Page 12

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st2064b

Manufacturer Part Number
st2064b
Description
8 Bit Microcontroller With 64k Bytes Rom
Manufacturer
Sitronix Technology Corporation
Datasheet
10.2.3 Dynamic input buffers of Port-A
When Port-A is used as keyboard return lines and one key is
pressed, the LCD segment waveform will input to Port-A and
then be affected by the input buffer of Port-A. Setting control bit
of PAK may enable the dynamic input buffer of the related
input pin and thus lower the effect on display quality.
The dynamic input buffer is enabled only when the LCD
keyboard awaking pulses exist, that is, LCTL[7]=0 LCTL[4]=1.
10.2 Port-A
10.2.1 Port-A Description
Port-A is a bit-programmable bi-direction I/O port, which is
controlled by PCA register. It also provides bit programmable
pull-up resistor for each input pin. Two interrupts can be
10.2.2 Port-A I/O Control
Direction of Port-A is controlled by PCA. Each bit of PCA
controls the direction of one single I/O of Port-A respectively,
Ver. 3.0
Address Name
Address Name
Address Name
$03C
$000
$008
$00E
$00F
$03E
$008
$00E
Bit 7~0: PCA[7~0] : Port-A directional bits
Bit 7~0: PAK[7~0] :
PA
PCA
PAK
PMCR
IREQ
IENA
PCA
PAK
1 = Port-A used as keyboard return line.
0 = Port-A used as keyboard normal I/O.
1 = Output mode
0 = Input mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PCA[7]
PCA[7]
PAK[7]
PAK[7]
PULL
PA[7]
Bit 7
Bit 7
Bit 7
-
-
TABLE 10-4 Port-A used as keyboard return line selection
PCA[6]
PCA[6]
PAK[6]
PAK[6]
PDBN
PA[6]
Bit 6
Bit 6
Bit 6
TABLE 10-3 Port-A Control Register (PCA)
TABLE 10-2 Summary Of Port-A Registers
-
-
PCA[5]
PCA[5]
PAK[5]
INTEG
PAK[5]
PA[5]
IRBT
Bit 5
IEBT
Bit 5
Bit 5
PCA[4]
PCA[4]
12/57
PAK[4]
PAK[4]
PA[4]
IRPT
IEPT
Bit 4
Bit 4
Bit 4
-
Otherwise setting of PAK will be ignored, and the dynamic
input buffer will be off.
Note: The dynamic input buffer can not pass the real value
triggered by Port-A, de-bounced interrupt for keyboard scan
and edge sensitive interrupt (PA0 only) for external event.
with “ 1” for output mode, and “ 0” for input mode.
PCA[3]
PCA[3]
PAK[3]
PAK[3]
TEST
PA[3]
Bit 3
IRT1
Bit 3
Bit 3
IET1
appears at input pin. It must be off when reading Port-A.
PCA[2]
PCA[2]
PAK[2]
PAK[2]
PA[2]
Bit 2
Bit 2
Bit 2
IRT0
IET0
-
PCA[1]
PCA[1]
PAK[1]
IRDAC
IEDAC
PAK[1]
PA[1]
Bit 1
Bit 1
Bit 1
-
PCA[0]
PCA[0]
PAK[0]
PAK[0]
PA[0]
Bit 0
Bit 0
Bit 0
IRX
IEX
-
0000 0000
0000 0000
- - 00 0000
- - 00 0000
0000 0000
0000 0000
100 - 0- - -
1111 1111
Default
Default
Default
ST2064B
5/8/09

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