74ALVC374PW,118 NXP Semiconductors, 74ALVC374PW,118 Datasheet - Page 5
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74ALVC374PW,118
Manufacturer Part Number
74ALVC374PW,118
Description
IC OCT D FF POS-EDG TRIG 20TSSOP
Manufacturer
NXP Semiconductors
Series
74ALVCr
Type
D-Type Busr
Datasheet
1.74ALVC374BQ115.pdf
(17 pages)
Specifications of 74ALVC374PW,118
Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
300MHz
Delay Time - Propagation
3.1ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVC374PW-T
74ALVC374PW-T
935269732118
74ALVC374PW-T
935269732118
NXP Semiconductors
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
74ALVC374_2
Product data sheet
Operating mode
Load and read register
Load register and disable
outputs
Symbol
V
I
V
I
V
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
I
O
tot
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW to HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the LOW to HIGH CP transition
Z = high-impedance OFF-state
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
For SO20 packages: above 70 C derate linearly with 8 mW/K.
For TSSOP20 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C derate linearly with 4.5 mW/K.
= LOW to HIGH clock transition
CC
Function table
Limiting values
= 0 V (power-down mode), the output voltage can be 3.6 V in normal operation.
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
[1]
Input
OE
L
L
H
H
Conditions
V
V
output HIGH or LOW state
output 3-state
power-down mode, V
V
T
CP
Rev. 02 — 17 October 2007
amb
I
O
O
< 0 V
> V
= 0 V to V
= 40 C to +85 C
CC
or V
CC
O
Octal D-type flip-flop; positive-edge trigger; 3-state
< 0 V
Dn
l
h
l
h
CC
= 0 V
[1] [2]
[2]
[3]
Internal flip-flop Output
L
H
L
H
Min
-
-
-
-
0.5
50
0.5
0.5
0.5
0.5
100
65
74ALVC374
Max
+4.6
-
+4.6
V
+4.6
+4.6
100
-
+150
500
50
50
CC
© NXP B.V. 2007. All rights reserved.
+ 0.5
Qn
L
H
Z
Z
Unit
V
mA
V
mA
V
V
V
mA
mA
mA
mW
C
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