mrf1550n Freescale Semiconductor, Inc, mrf1550n Datasheet - Page 9

• Manufacturer Part Number: mrf1550n
• Description: Rf Power Field Effect Transistors
• Manufacturer: Freescale Semiconductor, Inc

RF Device Data
Freescale Semiconductor
DESIGN CONSIDERATIONS
enhancement mode, Lateral Metal - Oxide Semiconductor
Field - Effect Transistor (MOSFET). Freescale Application
Note AN211A, “FETs in Theory and Practice”, is suggested
reading for those not familiar with the construction and char-
acteristics of FETs.
marily for VHF and UHF mobile power amplifier applications.
Manufacturability is improved by utilizing the tape and reel
capability for fully automated pick and placement of parts.
However, care should be taken in the design process to in-
sure proper heat sinking of the device.
clude high gain, simple bias systems, relative immunity from
thermal runaway, and the ability to withstand severely mis-
matched loads without suffering damage.
MOSFET CAPACITANCES
between all three terminals. The metal oxide gate structure
determines the capacitors from gate - to - drain (C
gate - to - source (C
rication of the RF MOSFET results in a junction capacitance
from drain - to - source (C
terized as input (C
(C
tween the inter - terminal capacitances and those given on
data sheets are shown below. The C
two ways:
method represents the actual operating conditions in RF ap-
plications.
DRAIN CHARACTERISTICS
in the full - on condition. This on - resistance, R
in the linear region of the output characteristic and is speci-
fied at a specific gate - source voltage and drain current. The
This device is a common - source, RF power, N - Channel
This surface mount packaged device was designed pri-
The major advantages of Lateral RF power MOSFETs in-
The physical structure of a MOSFET results in capacitors
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
In the latter case, the numbers are lower. However, neither
One critical figure of merit for a FET is its static resistance
rss
Gate
)
volts at the gate.
capacitances on data sheets. The relationships be-
C
C
gd
gs
gs
iss
). The PN junction formed during fab-
), output (C
ds
). These capacitances are charac-
Drain
Source
C
ds
oss
) and reverse transfer
iss
can be specified in
C
C
C
iss
oss
rss
APPLICATIONS INFORMATION
= C
= C
DS(on)
= C
gd
gd
gd
+ C
+ C
gd
, occurs
gs
ds
), and
drain - source voltage under these conditions is termed
V
coefficient at high temperatures because it contributes to the
power dissipation within the device.
quired for typical applications. Measurement of BV
recommended and may result in possible damage to the de-
vice.
GATE CHARACTERISTICS
is electrically isolated from the source by a layer of oxide.
The DC input resistance is very high - on the order of 10
— resulting in a leakage current of a few nanoamperes.
the gate greater than the gate - to - source threshold voltage,
V
rating. Exceeding the rated V
damage to the oxide layer in the gate region.
sentially capacitors. Circuits that leave the gate open - cir-
cuited or floating should be avoided. These conditions can
result in turn - on of the devices due to voltage build - up on
the input capacitor due to leakage currents or pickup.
monolithic zener diode from gate - to - source. If gate protec-
tion is required, an external zener diode is recommended.
Using a resistor to keep the gate - to - source impedance low
also helps dampen transients and serves another important
function. Voltage transients on the drain can be coupled to
the gate through the parasitic gate - drain capacitance. If the
gate - to - source impedance and the rate of voltage change
on the drain are both high, then the signal coupled to the gate
may be large enough to exceed the gate - threshold voltage
and turn the device on.
DC BIAS
rent flows only when the gate is at a higher potential than the
source. RF power FETs operate optimally with a quiescent
drain current (I
This device was characterized at I
suggested value of bias current for typical applications. For
special applications such as linear amplification, I
have to be selected to optimize the critical parameters.
fore, the gate bias circuit may generally be just a simple re-
sistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
gree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. This characteristic is
very dependent on frequency and load line.
DS(on)
GS(th)
BV
The gate of the RF MOSFET is a polysilicon material, and
Gate control is achieved by applying a positive voltage to
Gate Voltage Rating — Never exceed the gate voltage
Gate Termination — The gates of these devices are es-
Gate Protection — These devices do not have an internal
Since this device is an enhancement mode FET, drain cur-
The gate is a dc open circuit and draws no current. There-
Power output of this device may be controlled to some de-
DSS
.
. For MOSFETs, V
values for this device are higher than normally re-
DQ
), whose value is application dependent.
DS(on)
MRF1550NT1 MRF1550FNT1
GS
has a positive temperature
DQ
can result in permanent
= 150 mA, which is the
DSS
DQ
is not
may
9
Ω
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