mrf24j40 Microchip Technology Inc., mrf24j40 Datasheet - Page 24

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mrf24j40

Manufacturer Part Number
mrf24j40
Description
Ieee 802.15.4? 2.4 Ghz Rf Transceiver
Manufacturer
Microchip Technology Inc.
Datasheet

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6.3
The physical layer of the MRF24J40 controls the current
levels going to different sections of the device, as well as
thresholds and controls used in packet reception and
transmission. There are several registers that may
require modification in order to operate in the
application’s intended mode.
REGISTER 6-2:
REGISTER 6-3:
DS39776A-page 22
MRF24J40
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2-0
RFPLL
R/W-0
R/W-0
PHY Initialization
(1)
PLL must be enabled for RF reception or transmission.
RFPLL: RF-PLL Control bit
1 = PLL enabled
0 = PLL disabled
Reserved: Maintain as ‘0’
Unimplemented: Read as ‘0’
TXPOWER7:TXPOWER3: Small Scale Control for TX Power in dB bits
00000 = 0 dB
00001 = -1.25 dB
00010 = -2.5 dB
00011 = -3.75 dB
00100 = -5 dB
00101 = -6.25 dB
00110 = -7.5 dB
00111 = -8.75 dB
11111 = -38.75 dB
Unimplemented: Read as ‘0’
R/W-0
R/W-0
RFCTRL2: RF CONTROL REGISTER 2
r
RFCTRL3: RF CONTROL REGISTER 3
TXPOWER<7:3>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
r
Advance Information
(1)
R/W-0
R/W-0
r
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
R/W-0
Note:
r
The RSSI threshold defaults to ‘0’, how-
ever, it can be set to a user-defined RSSI
threshold limit. Please note, any RSSI
value resulting from a CCA request that is
below the RSSI threshold limit will result in
a failure.
U-0
U-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
U-0
U-0
U-0
U-0
bit 0
bit 0

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