upd720110a Renesas Electronics Corporation., upd720110a Datasheet - Page 3

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upd720110a

Manufacturer Part Number
upd720110a
Description
Usb 2.0 Hub Controller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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APLL
ALL_TT
CDR
DPC
DP(n)_PHY
EP0
EP1
F_TIM (Frame Timer)
FS_REP
OSB
ROM
ROM I/F
SERDES
SIE_2H
UP_PHY
UPC
: Translates the high-speed transactions (split transactions) for full/low-speed device
: Endpoint 0 controller
: Endpoint 1 controller
: Manages hub’s synchronization by using micro-SOF which is received at upstream
: Full/low-speed repeater is enabled when the
: Oscillator Block
: Contains default Descriptors
: Interface block for external Serial ROM which contains user-defined Descriptors
: Serializer and Deserializer
: Generates all clocks of Hub.
: Data & clock recovery circuit
: Downstream Port Controller handles Port Reset, Enable, Disable, Suspend and
: Downstream transceiver supports high-speed (480 Mbps), full-speed (12 Mbps), and
: Serial Interface Engine (SIE) controls USB2.0 and 1.1 protocol sequencer
: Upstream Transceiver supports high-speed (480 Mbps), full-speed (12 Mbps)
: Upstream Port Controller handles Suspend and Resume
to full/low-speed transactions.
upstream or downstream direction. For OUT transaction, ALL_TT buffers data from
upstream port and sends it out to the downstream facing ports after speed
conversion from high-speed to full/low-speed. For IN transaction, ALL_TT buffers
data from downstream ports and sends it out to the upstream facing ports after
speed conversion from full/low-speed to high-speed.
Resume
low-speed (1.5 Mbps) transaction
port, and generates SOF packet when full/low-speed device is attached to
downstream facing port.
mode
transaction
Data Sheet S15737EJ6V0DS
ALL_TT buffers the data transfer from either
µ
PD720110A is worked at full-speed
µ
PD720110A
3

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