upd72872 Renesas Electronics Corporation., upd72872 Datasheet - Page 14

• Manufacturer Part Number: upd72872
• Description: Ieee1394 1-chip Ohci Host Controller
• Manufacturer: Renesas Electronics Corporation.

2. PHY REGISTERS
2.1 Complete Structure for PHY Registers
14
Physical_ID
R
PS
RHB
IBR
Gap_count
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Field
Link_active
Resume_int
RHB
0
Size
6
1
1
1
1
6
R/W
R/W
R/W
R/W
Extended (7)
Page_select
Max_speed
R
R
R
Contender
ISBR
IBR
1
Reset value
Figure 2-1. Complete Structure of PHY Registers
000000
111111
0
0
0
Table 2-1. Bit Field Description (1/3)
Loop
2
Physical_ID
Data Sheet S14793EJ1V0DS
Physical_ID value selected from Self_ID period.
If this bit is 1, the node is root.
Cable power status.
Root Hold -off bit. If 1, becomes root at the bus reset.
Initiate bus reset.
Setting to 1 begins a long bus reset.
Long bus reset signal duration: 166 µ s.
Returns to 0 at the beginning of bus reset.
Gap count value.
It is updated by the changes of transmitting and receiving the PHY
configuration packet Tx/Rx.
The value is maintained after first bus reset.
After the second bus reset it returns to reset value.
1: Root
0: Not root
1: Cable power on
0: Cable power off
Reserved
Reserved
Reserved
Register0 (page_select)
Register1 (page_select)
Register2 (page_select)
Register3 (page_select)
Register4 (page_select)
Register5 (page_select)
Register6 (page_select)
Register7 (page_select)
Pwr_fail
Jitter
3
Reserved
Timeout
4
Gap_count
Description
Port_event
5
Total_ports
Port_select
Delay
Enab_accel
Pwr_class
R
6
Enab_multi
PS
7