upd17072 Renesas Electronics Corporation., upd17072 Datasheet - Page 116
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upd17072
Manufacturer Part Number
upd17072
Description
4-bit Single-chip Microcontroller With Hardware For Digital Tuning System
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD17072.pdf
(226 pages)
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14.2.1 Setting 2-/3-wire mode
output pin. The SO0/P1C0 pin is not used for the serial interface and is set in the general-purpose output port mode
by the SIOHIZ flag.
the SO1/SI/P0B3 pin is used as a serial data input pin.
SIOHIZ flag. The SO1/SI/P0B3 pin is used as a serial data input pin according to the setting of the SIOSEL flag.
14.2.2 Selecting data input/output using 2-wire serial interface
by the SIOSEL flag (refer to Figure 14-3 Configuration of Serial I/O Mode Select Register).
14.3 Clock Control Block
output timing.
14.4 Clock Counter
clock or an external clock.
116
The serial interface uses two pins in the two-wire mode: SCK/P0B2 and SO1/SI/P0B3.
The SCK/P0B2 pin is used as a shift clock input/output pin, and the SO1/SI/P0B3 pin is used as a serial data input/
In this way, the serial interface operates in the two-wire mode.
In the three-wire mode, three pins, SCK/P0B2, SO0/P1C0, and SO1/SI/P0B3 are used.
The SCK/P0B2 is used as a shift clock input/output pin, the SO0/P1C0 pin is used as a serial data output pin, and
Unlike in the two-wire mode, the SO0/P1C0 pin is used as a serial data output pin according to the setting of the
In this way, the serial interface operates in the three-wire mode.
In the two-wire mode, the SO1/SI/P0B3 pin is used as an input/output pin for serial data.
Whether the SO1/SI/P0B3 pin is used as a serial data input pin (SI pin) or serial data output pin (SO1 pin) is specified
The clock control block generates a clock when the internal clock is used (master operation), and controls clock
The frequency f
Figure 14-2 shows the configuration and function of the serial I/O clock select register.
For the clock generation timing, refer to 14.7 Operation of Serial Interface.
The clock counter counts the shift clock output or input from the shift clock pin (SCK/P0B2 pin).
Because the clock counter directly reads the status of the clock pin, it cannot identify whether the clock is an internal
The contents of the clock counter cannot be directly read by software.
For the operation and timing chart of the clock counter, refer to 14.7 Operation of Serial Interface.
SC
of the internal clock is set by the SIOCK0 and SIOCK1 flags of the serial I/O clock select register.
PD17072,17073
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