ds2065w Maxim Integrated Products, Inc., ds2065w Datasheet - Page 6

• Manufacturer Part Number: ds2065w
• Description: 3.3v Single-piece 8mb Nonvolatile Sram Integrated Products
• Manufacturer: Maxim Integrated Products, Inc.

DS2065W 3.3V Single-Piece 8Mb
Nonvolatile SRAM
6
Note 1: RST is an open-drain output and cannot source current. An external pullup resistor should be connected to this pin to real-
Note 2: These parameters are sampled with a 5pF load and are not 100% tested.
Note 3: t
Note 4: t
Note 5: t
Note 6: t
Note 7: In a power-down condition, the voltage on any pin cannot exceed the voltage on V
Note 8: The expected t
Note 9: WE is high for a read cycle.
Note 10: OE = V
Note 11: If the CE low transition occurs simultaneously with or latter than the WE low transition, the output buffers remain in a high-
Note 12: If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain in a high-
Note 13: If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain
Note 14: DS2065W BGA modules are recognized by Underwriters Laboratory (UL) under file E99151.
_____________________________________________________________________
~
(SEE NOTES 1, 7.)
2.5V
V
RST
V
CE,
WE
CC
TP
BACKUP CURRENT
LITHIUM BATTERY
SUPPLIED FROM
CE or WE going high.
user. Minimum expected data-retention time is based on a maximum of two +230°C convection solder reflow exposures,
followed by a fully charged cell. Full charge occurs with the initial application of V
meter is assured by component selection, process control, and design. It is not measured directly in production testing.
in a high-impedance state during this period.
ize a logic-high level.
impedance state during this period.
impedance state during this period.
WP
WR1
WR2
DS
is measured from the earlier of CE or WE going high.
is specified as the logical AND of CE and WE. t
and t
and t
IH
or V
DH1
DH2
IL
are measured from WE going high.
are measured from CE going high.
DR
. If OE = V
is defined as accumulative time in the absence of V
t
PD
t
F
IH
during write cycle, the output buffers remain in a high-impedance state.
V
OL
t
RPD
WP
SLEWS WITH
is measured from the latter of CE or WE going low to the earlier of
t
DR
V
CC
Power-Down/Power-Up Condition
CC
starting from the time power is first applied by the
t
CC
PU
CC
.
for a minimum of 96 hours. This para-
t
t
RPU
R
V
OL
V
IH
t
REC