ds75u-t-r Maxim Integrated Products, Inc., ds75u-t-r Datasheet - Page 12

• Manufacturer Part Number: ds75u-t-r
• Description: Ds75 Digital Thermometer And Thermostat
• Manufacturer: Maxim Integrated Products, Inc.

GENERAL 2-WIRE INFORMATION
Writing to the DS75—
address byte containing the DS75 bus address. The value of the R/W bit must be a 0, which indicates that
a write is about to take place. The DS75 will respond with an ACK after receiving the address byte. This
must be followed by a pointer byte from the master, which tells the DS75 which register is being written
to. The DS75 will again respond with an ACK after receiving the pointer byte. Following this ACK the
master device must immediately begin transmitting data to the DS75. When writing to the configuration
register, the master must send one byte of data (see Figure 9a), and when writing to the T
registers the master must send two bytes of data (see Figure 9b). After receiving each data byte, the DS75
will respond with an ACK, and the transaction is finished with a STOP from the master.
Reading from the DS75—
desired register during a previous transaction, the read can be performed immediately without changing
the pointer setting. In this case the master sends a START followed by an address byte containing the
DS75 bus address. The R/W bit must be a 1, which tells the DS75 that a read is being performed. After
the DS75 sends an ACK in response to the address byte, the DS75 will begin transmitting the requested
data on the next clock cycle. When reading from the configuration register, the DS75 will transmit one
byte of data, after which the master must respond with a NACK followed by a STOP (see Figure 9c). For
two-byte reads (i.e., from the Temperature, T
data, and the master must respond to the first data byte with an ACK and to the second byte with a NACK
followed by a STOP (see Figure 9d). If only the most significant byte of data is needed, the master can
issue a NACK followed by a STOP after reading the first data byte in which case the transaction will be
the same as for a read from the configuration register.
If the pointer is not already pointing to the desired register, the pointer must first be updated as shown in
Figure 9e, which shows a pointer update followed by a single-byte read. The value of the R/W bit in the
initial address byte is a 0 (“write”) since the master is going to write a pointer byte to the DS75. After the
DS75 to the address byte with an ACK, the master sends a pointer byte that corresponds to the desired
register. The master must then perform a repeated start followed by a standard one or two byte read
sequence (with R/W =1) as described in the previous paragraph.
All data is transmitted MSb first over the 2-wire bus.
One bit of data is transmitted on the 2-wire bus each SCL period.
A pullup resistor is required on the SDA line and, when the bus is idle, both SDA and SCL must remain
in a logic-high state.
All bus communication must be initiated with a START condition and terminated with a STOP
condition. During a START or STOP is the only time SDA is allowed to change states while SCL is
high. At all other times, changes on the SDA line can only occur when SCL is low: SDA must remain
stable when SCL is high.
After every 8-bit (1-byte) transfer, the receiving device must answer with an ACK (or NACK), which
takes one SCL period. Therefore, nine clocks are required for every one-byte data transfer.
0
0
0
0
To write to the DS75, the master must generate a START followed by an
0
When reading from the DS75, if the pointer was already pointed to the
0
OS
P1
or T
12 of 14
HYST
P0
register), the DS75 will transmit two bytes of
OS
or T
DS75
HYST