mr2a16a ETC-unknow, mr2a16a Datasheet - Page 8

• Manufacturer Part Number: mr2a16a
• Description: 256k X 16-bit 3.3-v Asynchronous Magnetoresistive Ram
• Manufacturer: ETC-unknow

Timing Specifications
Write Mode
8
NOTES:
Write cycle time
Address set-up time
Address valid to end of write
Address valid to end of write
Write pulse width (G high)
Write pulse width (G low)
Data valid to end of write
Data hold time
Write low to data Hi-Z
Write high to output active
Write recovery time
(G high)
(G low)
1. A write occurs during the overlap of E low and W low.
2. Due to product sensitivities to noise, power supplies must be properly grounded and decoupled and bus contention
3. If G goes low at the same time or after W goes low, the output will remain in a high-impedance state.
4. After W, E, or UB/LB has been brought high, the signal must remain in steady-state high for a minimum of 2 ns.
5. This parameter is sampled and not 100% tested.
6. Transition is measured r200 mV from steady-state voltage.
7. At any given voltage or temperature, t
8. All write cycle timings are referenced from the last valid address to the first transition address.
conditions must be minimized or eliminated during read and write cycles.
Parameter
Table 10. Write Cycle Timing 1 (W Controlled; See Notes 1, 2, 3, and 4)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WLWH
WHDX
WHQX
AVWH
AVWH
WLEH
WLEH
DVWH
WLQZ
WHAX
AVWL
AVAV
WLQZ
max < t
MR2A16A/D, Rev. 0.1
Min
20
12
15
0
8
8
5
0
0
3
8
20
WHQX
Max
—
—
—
—
—
—
—
—
—
—
7
min.
Min
Timing Set
25
15
17
10
10
10
0
6
0
0
3
25
Max
—
—
—
—
—
—
—
—
—
—
9
Min
35
18
20
15
15
10
12
0
0
0
3
35
Max
12
—
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
5, 6, 7
5, 6, 7
8