74LVX574SJX Fairchild Semiconductor, 74LVX574SJX Datasheet
![no-image](/images/manufacturer_photos/0/2/252/fairchild_semiconductor_sml.jpg)
74LVX574SJX
Specifications of 74LVX574SJX
Related parts for 74LVX574SJX
74LVX574SJX Summary of contents
Page 1
... Pin Names D – – © 2005 Fairchild Semiconductor Corporation Features Input voltage translation from Ideal for low power/low noise 3.3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Package Description Connection Diagram Description Data Inputs Clock Pulse Input 3-STATE Output Enable Input ...
Page 2
Functional Description The LVX574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D ...
Page 3
Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. Input Voltage ( Output Diode Current ( 0. 0.5V ...
Page 4
AC Electrical Characteristics V CC Symbol Parameter (V) f Maximum 2.7 MAX Clock r Frequency 3.3 0.3 t Propagation 2.7 PLH t Delay Time PHL 3.3 0 3-STATE Output 2.7 PZL t Enable Time ...
Page 5
Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...
Page 6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...
Page 7
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...