MX29LV640BT Macronix International, MX29LV640BT Datasheet
MX29LV640BT
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MX29LV640BT Summary of contents
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... Minimum 100,000 erase/program cycle • 10 years data retention GENERAL DESCRIPTION The MX29LV640BT/ 64-mega bit Flash memory organized as 8M bytes of 8 bits or 4M words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. ...
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... In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29LV640BT/BB uses a 2.7V to 3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process ...
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... NC* 2 NC* NC Ball are shorted together via the substrate but not connected to the die. P/N:PM1076 MX29LV640BT/ MX29LV640BT/ 12.0 mm A13 A12 A14 A15 A16 BYTE A10 A11 Q7 ...
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... Hardware Reset Pin, Active Low WP#/ACC Hardware Write Protect/Programming Acceleration Input RY/BY# Read/Busy Output BYTE# Selects 8 bit or 16 bit mode VCC +3.0V single power supply GND Device Ground NC Pin Not Connected Internally P/N:PM1076 MX29LV640BT/BB LOGIC SYMBOL 22 A0-A21 Q0-Q15 (A-1) CE# OE# WE# RY/BY# RESET# WP#/ACC BYTE ...
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... BLOCK DIAGRAM CE# OE# CONTROL WE# INPUT WP#/ACC LOGIC BYTE# RESET# ADDRESS LATCH A0-A21 AND BUFFER Q0-Q15 P/N:PM1076 MX29LV640BT/BB PROGRAM/ERASE HIGH VOLTAGE FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 5 WRITE STATE MACHINE (WSM) STATE REGISTER ...
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... MX29LV640BT SECTOR GROUP ARCHITECTURE Sector Sector Sector Address Group A21-A12 1 SA0 0000000xxx 1 SA1 0000001xxx 1 SA2 0000010xxx 1 SA3 0000011xxx 2 SA4 0000100xxx 2 SA5 0000101xxx 2 SA6 0000110xxx 2 SA7 0000111xxx 3 SA8 0001000xxx 3 SA9 0001001xxx 3 SA10 0001010xxx 3 SA11 0001011xxx 4 SA12 0001100xxx 4 SA13 0001101xxx 4 SA14 0001110xxx ...
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... SA70 1000110xxx 18 SA71 1000111xxx 19 SA72 1001000xxx 19 SA73 1001001xxx 19 SA74 1001010xxx 19 SA75 1001011xxx 20 SA76 1001100xxx 20 SA77 1001101xxx 20 SA78 1001110xxx 20 SA79 1001111xxx P/N:PM1076 MX29LV640BT/BB Sector Size (x8) (Kbytes/Kwords) Address Range 64/32 280000h-28FFFFh 64/32 290000h-29FFFFh 64/32 2A0000h-2AFFFFh 64/32 2B0000h-2BFFFFh 64/32 2C0000h-2CFFFFh 64/32 2D0000h-2DFFFFh 64/32 2E0000h-2EFFFFh 64/32 2F0000h-2FFFFFh 64/32 300000h-30FFFFh 64/32 310000h-31FFFFh 64/32 320000h-32FFFFh 64/32 330000h-33FFFFh 64/32 340000h-34FFFFh 64/32 ...
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... SA108 1101100xxx 28 SA109 1101101xxx 28 SA110 1101110xxx 28 SA111 1101111xxx 29 SA112 1110000xxx 29 SA113 1110001xxx 29 SA114 1110010xxx 29 SA115 1110011xxx 30 SA116 1110100xxx 30 SA117 1110101xxx 30 SA118 1110110xxx 30 SA119 1110111xxx P/N:PM1076 MX29LV640BT/BB Sector Size (x8) (Kbytes/Kwords) Address Range 64/32 500000h-50FFFFh 64/32 510000h-51FFFFh 64/32 520000h-52FFFFh 64/32 530000h-53FFFFh 64/32 540000h-54FFFFh 64/32 550000h-55FFFFh 64/32 560000h-56FFFFh 64/32 570000h-57FFFFh 64/32 580000h-58FFFFh 64/32 590000h-59FFFFh ...
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... SA131 1111111100 38 SA132 1111111101 39 SA133 1111111110 40 SA134 1111111111 Note:The address range is A21:A-1 in byte mode (BYTE#=VIL) or A20:A0 in word mode (BYTE#=VIH) Top Boot Security Sector Addresses Sector Address A21~A12 1111111111 P/N:PM1076 MX29LV640BT/BB Sector Size (Kbytes/Kwords) Address Range 64/32 780000h-78FFFFh 64/32 790000h-79FFFFh 64/32 7A0000h-7AFFFFh 64/32 7B0000h-7BFFFFh 64/32 ...
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... SA29 0010110xxx 14 SA30 0010111xxx 15 SA31 0011000xxx 15 SA32 0011001xxx 15 SA33 0011010xxx 15 SA34 0011011xxx 16 SA35 0011100xxx 16 SA36 0011101xxx 16 SA37 0011110xxx 16 SA38 0011111xxx P/N:PM1076 MX29LV640BT/BB Sector Size (x8) (Kbytes/Kwords) Address Range 8/4 000000h-001FFFh 8/4 002000h-003FFFh 8/4 004000h-005FFFh 8/4 006000h-007FFFh 8/4 008000h-009FFFh 8/4 00A000h-00BFFFh 8/4 00C000h-00DFFFh 8/4 00E000h-00FFFFh 64/32 010000h-01FFFFh 64/32 020000h-02FFFFh 64/32 030000h-03FFFFh 64/32 040000h-04FFFFh 64/32 050000h-05FFFFh 64/32 ...
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... SA69 0111110xxx 24 SA70 0111111xxx 25 SA71 1000000xxx 25 SA72 1000001xxx 25 SA73 1000010xxx 25 SA74 1000011xxx 26 SA75 1000100xxx 26 SA76 1000101xxx 26 SA77 1000110xxx 26 SA78 1000111xxx P/N:PM1076 MX29LV640BT/BB Sector Size (x8) (Kbytes/Kwords) Address Range 64/32 200000h-20FFFFh 64/32 210000h-21FFFFh 64/32 220000h-22FFFFh 64/32 230000h-23FFFFh 64/32 240000h-24FFFFh 64/32 250000h-25FFFFh 64/32 260000h-26FFFFh 64/32 270000h-27FFFFh 64/32 280000h-28FFFFh 64/32 290000h-29FFFFh 64/32 2A0000h-2AFFFFh 64/32 2B0000h-2BFFFFh 64/32 2C0000h-2CFFFFh 64/32 ...
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... SA107 1100100xxx 34 SA108 1100101xxx 34 SA109 1100110xxx 34 SA110 1100111xxx 35 SA111 1101000xxx 35 SA112 1101001xxx 35 SA113 1101010xxx 35 SA114 1101011xxx 36 SA115 1101100xxx 36 SA116 1101101xxx 36 SA117 1101110xxx 36 SA118 1101111xxx P/N:PM1076 MX29LV640BT/BB Sector Size (x8) (Kbytes/Kwords) Address Range 64/32 480000h-48FFFFh 64/32 490000h-49FFFFh 64/32 4A0000h-4AFFFFh 64/32 4B0000h-4BFFFFh 64/32 4C0000h-4CFFFFh 64/32 4D0000h-4DFFFFh 64/32 4E0000h-4EFFFFh 64/32 4F0000h-4FFFFFh 64/32 500000h-50FFFFh 64/32 510000h-51FFFFh ...
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... SA131 1111100xxx 40 SA132 1111101xxx 40 SA133 1111110xxx 40 SA134 1111111xxx Note:The address range is A20:A-1 in byte mode (BYTE#=VIL) or A20:A0 in word mode (BYTE#=VIH) Bottom Boot Security Sector Addresses Sector Address A21~A12 0000000000 P/N:PM1076 MX29LV640BT/BB Sector Size (Kbytes/Kwords) Address Range 64/32 700000h-70FFFFh 64/32 710000h-71FFFFh 64/32 720000h-72FFFFh 64/32 730000h-73FFFFh 64/32 ...
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... If WP#=VIL, the two outermost boot sectors remain protected. If WP#=VIH, the two outermost boot sector protection depends on whether they were last protected or unprotect using the method described in "Sector/ Sector Block Protection and Unprotect" required by command sequence, Data# polling or sector protect algorithm (see Figure 14). IN OUT P/N:PM1076 MX29LV640BT/BB WP# ACC SET L/H X ...
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... Manufactures Code Read Device Code Silicon (Top Boot Block) ID Device Code (Bottom Boot Block) Sector Protect Verify Secured Silicon Sector Indicator Bit (Q7) Notes: 1.code=xx00h means unprotected, or code=xx01h means protected, SA=Sector Address, X=Don't care. P/N:PM1076 MX29LV640BT/BB CE# OE# WE ...
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... WP#/ACC pin must not be at VHH for operations other than accelerated programming, or device damage may result. STANDBY MODE MX29LV640BT/BB can be set into Standby mode with two different approaches. One is using both CE# and RESET# pins and the other one is using RESET# pin only. ...
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... It is also possible to determine if the group is protected in the system by writing a Read Silicon ID command. Performing a read operation with A1=VIH, it will produce a logical "1" for the protected sector. CHIP UNPROTECT OPERATION The MX29LV640BT/BB also features the chip unprotect 17 REV. 1.2, SEP. 07, 2005 ...
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... A9 pin, VIL on CE#, OE#, A6, and A1 pins. Which ID apply VIL on A0 pin, the device will output MXIC's manu- facture code of C2H. Which apply VIH on A0 pin, the device will output MX29LV640BT/BB device code of C9H/ CBH. VERIFY SECTOR GROUP PROTECT STATUS OPERATION MX29LV640BT/BB provides hardware method for sector group protect status verify ...
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... CE# = VIH or WE# = VIH. To initiate a write cycle CE# and WE# must be a logical zero while OE logical one. POWER-UP SEQUENCE The MX29LV640BT/BB powers up in the Read only mode. In addition, the memory contents may only be altered after successful completion of the predefined command sequences. POWER-UP WRITE INHIBIT ...
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... In device with an ESN, the Secured Silicon Sector is protected when the device is shipped from the factory. The Secured Silicon Sector cannot be modified in any way. A factory locked device has an 8-word random ESN at address 3FFF70h-3FFF77h (for MX29LV640BT) or 000000h-000007h (for MX29LV640BB). CUSTOMER LOCKABLE:Secured Silicon Sector NOT Programmed or Protected At the ...
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... Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table 3 defines the valid register command sequences. Note that the Erase Suspend (B0H) and TABLE 3. MX29LV640BT/BB COMMAND DEFINITIONS Command Read (Note 5) Reset (Note 6) ...
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... Erase Resume command is valid only during the Erase Suspend mode. 12.Command is valid when device is ready to read array data or when device is in automatic select mode. P/N:PM1076 MX29LV640BT/BB PD=Data to be programmed at location PA. Data is latched on the rising edge of WE# or CE# pulse. SA=Address of the sector to be erase or verified (in autoselect mode) ...
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... If Q5 goes high during a program or erase operation, writing the reset command returns the device to reading P/N:PM1076 MX29LV640BT/BB array data (also applies during Erase Suspend). SILICON ID READ COMMAND SEQUENCE The SILICON ID READ command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not a sector is pro- tected ...
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... Two more "unlock" write cycles are then followed by the chip erase command 10H, or the sector erase command 30H. The MX29LV640BT/BB contains a Silicon-ID-Read op- eration to supplement traditional PROM programming methodology. The operation is initiated by writing the read silicon ID command sequence into the command register ...
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... QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV640BT/BB is capable of operating in the CFI mode. This mode all the host system to determine the manufacturer of the device such as operating parameters and configuration. Two commands are required in CFI mode ...
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... Maximum timeout for full chip erase times (not supported) Table 4-3. CFI Mode: Device Geometry Data Values Description n Device size (2 bytes) Flash device interface code (02=asynchronous x8/x16) Maximum number of bytes in multi-byte write (not supported) P/N:PM1076 MX29LV640BT/BB Address h Address h Address h Address h N us) N us) N ms) ...
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... Burst mode type (0=not supported) Page mode type (0=not supported) ACC (Acceleration) Supply Minimum 00h=Not Supported, D7-D4: Volt, D3-D0:100mV ACC (Acceleration) Supply Maximum 00h=Not Supported, D7-D4: Volt, D3-D0:100mV Top/Bottom Boot Sector Flag 02h=Bottom Boot Device, 03h=Top Boot Device P/N:PM1076 MX29LV640BT/ ...
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... Performing successive read operations from any address will cause Q6 to toggle. 3. Reading the byte address being programmed while in the erase-suspend program mode will indicate logic "1" at the Q2 bit. However, successive reads from the erase-suspended sector will cause Q2 to toggle. P/N:PM1076 MX29LV640BT/BB Q7 Note1 Q7 0 ...
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... Erase Suspend mode. Toggle Bit I may be read at any address, and is valid after the rising edge of the final WE# or CE#, whichever P/N:PM1076 MX29LV640BT/BB happens first pulse in the command sequence (prior to the program or erase operation), and during the sector time-out. ...
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... Data# Polling and Toggle Bit are the only operating functions of the device under this con- dition. P/N:PM1076 MX29LV640BT/BB If this time-out condition occurs during sector erase op- eration, it specifies that a particular sector is bad and it may not be reused. However, other sectors are still func- tional and may be used for the program or erase opera- tion ...
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... If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Suspend mode.) If the output is high (Ready), the device is ready to read array data (including during the Erase Suspend mode the standby mode. P/N:PM1076 MX29LV640BT/BB 31 REV. 1.2, SEP. 07, 2005 ...
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... This is a stress rating only; functional operation of the device at these or any other conditions above those in- dicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maxi- mum rating conditions for extended periods may affect device reliability. P/N:PM1076 MX29LV640BT/BB OPERATING RATINGS Commercial (C) Devices +150 o C ...
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... ICC active while Embedded Erase or Embedded Program is in progress. 5. Automatic sleep mode enables the low power mode when addresses remain stable for t ACC + 30 ns. Typical sleep mode current is 200 nA. 6. Not 100% tested. P/N:PM1076 MX29LV640BT/BB TA=- VCC=2.7V~3.6V Test Conditions VIN = VSS to VCC , VCC = VCC max VCC=VCC max ...
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... KEY TO SWITCHING WAVEFORMS WAVEFORM INPUTS Don't Care, Any Change Permitted Does Not Apply SWITCHING TEST WAVEFORMS 3.0V 0.0V P/N:PM1076 MX29LV640BT/BB TEST SPECIFICATIONS Test Condition Output Load 2.7K ohm Output Load Capacitance 3.3V (including jig capacitance) Input Rise and Fall Times Input Pulse Levels ...
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... OE#, whichever Occurs First tOEH Output Enable Hold Time (Note 1) Notes: 1. Not 100% tested. 2. See SWITCHING TEST CIRCUITS and TEST SPECIFICATIONS TABLE for test specifications. P/N:PM1076 MX29LV640BT/BB TA=- VCC=2.7V~3.6V Test Setup CE#, OE#=VIL Max OE#=VIL Read Toggle and Data# Polling ...
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... Figure 1. COMMAND WRITE OPERATION VCC 3V VIH Addresses VIL VIH WE# VIL CE# VIH VIL OE# VIH VIL VIH Data VIL P/N:PM1076 MX29LV640BT/BB ADD Valid tAH tAS tWP tCWC tCS tCH tDS tDH DIN 36 tWPH REV. 1.2, SEP. 07, 2005 ...
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... READ/RESET OPERATION Figure 2. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE# VIL VIH WE# VIL VIH OE# VIL HIGH Z VOH Outputs VOL VIH RESET# VIL RY/BY# 0V P/N:PM1076 MX29LV640BT/BB tRC ADD Valid tCE tRH tRH tOEH tOE tACC DATA Valid 37 tDF tOH HIGH Z REV. 1.2, SEP. 07, 2005 ...
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... RESET# Low to Standby Mode Note:Not 100% tested Figure 3. RESET# TIMING WAVEFORM RY/BY# CE#, OE# RESET# Reset Timing NOT during Automatic Algorithms RY/BY# CE#, OE# RESET# P/N:PM1076 MX29LV640BT/BB tRH tRP2 tReady2 tReady1 tRP1 Reset Timing during Automatic Algorithms 38 Test Setup All Speed Options Unit MAX 20 us ...
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... Address CE# OE# WE# tCS Data RY/BY# tVCS VCC NOTES: 1.SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write Operation Status"). P/N:PM1076 MX29LV640BT/BB Erase Command Sequence(last two cycle) tWC tAS 2AAh SA 555h for chip erase tAH tCH tWP tWPH tDS tDH 55h ...
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... Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM1076 MX29LV640BT/BB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H Data Poll ...
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... Figure 6. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM1076 MX29LV640BT/BB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address NO Last Sector ...
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... Figure 7. ERASE SUSPEND/RESUME FLOWCHART P/N:PM1076 MX29LV640BT/BB START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase Another NO Erase Suspend ? YES 42 REV. 1.2, SEP. 07, 2005 ...
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... Figure 8. SECURED SILICON SECTOR PROTECTED ALGORITHMS FLOWCHART P/N:PM1076 MX29LV640BT/BB START Enter Secured Silicon Sector Wait 1us First Wait Cycle Data=60h Second Wait Cycle Data=60h A6=0, A1=1, A0=0 Wait 300us No Data = 01h ? Yes Device Failed Write Reset Command Secured Sector Protect Complete 43 REV. 1.2, SEP. 07, 2005 ...
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... VHH Rise and Fall Time (Note 1) tVCS VCC Setup Time (Note 1) tRB Write Recovery Time from RY/BY# tBUSY Program/Erase Valid to RY/BY# Delay Notes: 1. Not 100% tested. 2. See the "Erase And Programming Performance" section for more information. P/N:PM1076 MX29LV640BT/BB TA=- VCC=2.7V~3.6V Byte Word 44 Speed Options 90 120 Unit Min 90 ...
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... Data RY/BY# tVCS VCC NOTES: 1.PA=Program Address, PD=Program Data, DOUT is the true data the program address Figure 10. ACCELERATED PROGRAM TIMING DIAGRAM VHH ACC VIL or VIH P/N:PM1076 MX29LV640BT/BB Program Command Sequence(last two cycle) tWC tAS XXXh PA tAH tCH tWP tWPH tDS tDH ...
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... WE# Hold Time tCP CE# Pulse Width tCPH CE# Pulse Width High tWHWH1 Programming Operation tWHWH2 Sector Erase Operation (Note 2) Notes: 1. Not 100% tested. 2. See the "Erase And Programming Performance" section for more information. P/N:PM1076 MX29LV640BT/BB Speed Options 90 Min 90 Min Min 45 Min 45 Min Min Min ...
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... Data tRH RESET# RY/BY# NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, Q7=complement of data written to device. 2.Figure indicates the last two bus cycles of the command sequence. P/N:PM1076 MX29LV640BT/BB PA for program SA for sector erase 555 for chip erase Data# Polling tWC tAS tAH tWH ...
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... Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM1076 MX29LV640BT/BB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data Poll from system No Verify Word Ok ? YES No Last Address ? YES Auto Program Completed 48 REV ...
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... Figure 13. Sector Group Protect / Chip Unprotect Waveform (RESET# Control) VID VIH RESET# SA, A6 A1, A0 Sector Group Protect or Chip Unprotect Data 1us CE# WE# OE# Note: For sector group protect A6=0, A1=1, A0=0. For chip unprotect A6=1, A1=1, A0=0 P/N:PM1076 MX29LV640BT/BB Valid* 60h 60h Sector Group Protect:150us Chip Unprotect:15ms 49 Valid* Valid* Verify Status 40h REV. 1.2, SEP. 07, 2005 ...
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... Yes Device failed Protect another Sector Protect Algorithm Remove VID from RESET# Write reset command Sector Protect complete P/N:PM1076 MX29LV640BT/BB START Protect all sectors: PLSCNT=1 The indicated portion of the sector protect algorithm must be performed RESET#=VID for all unprotected sectors prior to issuing the first ...
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... Write pulse width for chip unprotect tOESP OE# setup time to WE# active Figure 15. SECTOR GROUP PROTECT TIMING WAVEFORM (A9, OE# Control 12V 3V A9 12V 3V OE# WE# CE# Data A21-A16 P/N:PM1076 MX29LV640BT/BB tVLHT tVLHT tWPP 1 tOESP Sector Address 51 Test Setup All Speed Options Min. 4 Min. 100 Min. 100 Min. 4 ...
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... Figure 16. SECTOR GROUP PROTECTION ALGORITHM (A9, OE# Control) PLSCNT=32? Device Failed P/N:PM1076 MX29LV640BT/BB START Set Up Sector Addr PLSCNT=1 OE#=VID, A9=VID, CE#=VIL A6=VIL Activate WE# Pulse Time Out 150us Set WE#=VIH, CE#=OE#=VIL A9 should remain VID Read from Sector No Addr=SA, A1=1 No Data=01H? Yes Protect Another ...
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... Figure 17. CHIP UNPROTECT TIMING WAVEFORM (A9, OE# Control) A1 12V 3V A9 tVLHT A6 12V 3V OE# tVLHT WE# CE# Data P/N:PM1076 MX29LV640BT/BB tWPP 2 tOESP 53 Verify tVLHT 00H F0H tOE REV. 1.2, SEP. 07, 2005 ...
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... Figure 18. CHIP UNPROTECT FLOWCHART (A9, OE# Control) Increment Sector Addr P/N:PM1076 MX29LV640BT/BB START Protect All Sectors PLSCNT=1 Set OE#=A9=VID CE#=VIL, A6=1 Activate WE# Pulse Time Out 15ms Set OE#=CE#=VIL A9=VID, A1=1 Set Up First Sector Addr Read Data from Device Data=00H? Yes No All sectors have ...
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... RESET# Setup Time for Temporary Sector Unprotect tRRB RESET# Hold Time from RY/BY# High for Temporary Sector Group Unprotect Figure 19. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS 12V RESET tVIDR CE# WE# RY/BY# P/N:PM1076 MX29LV640BT/BB Program or Erase Command Sequence tRSP 55 Test All Speed Options Unit Setup Min 500 ns Min 4 us ...
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... Figure 20. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART P/N:PM1076 MX29LV640BT/BB Start RESET# = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET# = VIH Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. VID=11.5V~12.5V 2. All previously protected sectors are protected again. 56 REV. 1.2, SEP. 07, 2005 ...
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... VIH ADD A0 VIL A1 VIH VIL VIH ADD VIL CE# VIH VIL VIH WE# VIL VIH OE# VIL VIH DATA VIL Q0-Q15 P/N:PM1076 MX29LV640BT/BB tACC tACC tCE tOE tOH DATA OUT 00C2H 57 tDF tOH DATA OUT 22C9H for Top 22CBH for Bottom REV. 1.2, SEP. 07, 2005 ...
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... CE# tCH OE# tOEH WE# Q7 Q0-Q6 tBUSY RY/BY# NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and array data raed cycle. P/N:PM1076 MX29LV640BT/BB tRC VA VA tACC tCE tOE tDF tOH Complement Status Data Status Data Status Data ...
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... Figure 23. DATA# POLLING ALGORITHM Notes: 1.VA=valid address for programming. 2.Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1076 MX29LV640BT/BB Start Read Q7~Q0 Add.=VA(1) Yes Q7 = Data ? Yes Read Q7~Q0 Add.=VA Yes Q7 = Data ? (2) No FAIL Pass 59 REV. 1.2, SEP. 07, 2005 ...
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... WE# tDH Q6/Q2 Valid Status RY/BY# NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command sequence, last status read cycle, and array data read cycle. P/N:PM1076 MX29LV640BT/BB tRC VA VA tACC tCE tOE tDF tOH Valid Status Valid Status ...
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... Figure 25. TOGGLE BIT ALGORITHM Note: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM1076 MX29LV640BT/BB START Read Q7~Q0 Read Q7~Q0 (Note 1) NO Toggle Bit Q6 =Toggle? YES NO Q5=1? YES (Note 1,2) Read Q7~Q0 Twice ...
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... Figure 26. Q6 versus Q2 Enter Embedded Erasing Erase WE NOTES: The system can use toggle Q2/Q6, Q2 toggles only when read at an address within an erase-suspended P/N:PM1076 MX29LV640BT/BB Erase Enter Erase Suspend Suspend Program Erase Suspend Erase Read Suspend Program 62 Erase Resume ...
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... Includes all pins except Vcc. Test conditions: Vcc = 3.0V, one pin at a time. TSOP PIN CAPACITANCE Parameter Symbol CIN COUT CIN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions TA=25 C, f=1.0MHz P/N:PM1076 MX29LV640BT/BB MIN. Byte Mode Word Mode 100,000 Parameter Description Test Set Input Capacitance VIN=0 Output Capacitance ...
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... ORDERING INFORMATION PLASTIC PACKAGE PART NO. ACCESS TIME MX29LV640BTTC-90 MX29LV640BTTC-12 MX29LV640BBTC-90 MX29LV640BBTC-12 MX29LV640BTTI-90 MX29LV640BTTI-12 MX29LV640BBTI-90 MX29LV640BBTI-12 MX29LV640BTTC-90G MX29LV640BTTC-12G MX29LV640BBTC-90G MX29LV640BBTC-12G MX29LV640BTTI-90G MX29LV640BTTI-12G MX29LV640BBTI-90G MX29LV640BBTI-12G P/N:PM1076 MX29LV640BT/BB Ball Pitch/ (ns) Ball size 90 120 90 120 90 120 90 120 90 120 90 120 90 120 90 120 64 PACKAGE Remark 48 Pin TSOP ...
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... PART NO. ACCESS TIME MX29LV640BTXBC-90 MX29LV640BTXBC-12 MX29LV640BBXBC-90 MX29LV640BBXBC-12 MX29LV640BTXBI-90 MX29LV640BTXBI-12 MX29LV640BBXBI-90 MX29LV640BBXBI-12 MX29LV640BTXBC-90G MX29LV640BTXBC-12G MX29LV640BBXBC-90G MX29LV640BBXBC-12G MX29LV640BTXBI-90G MX29LV640BTXBI-12G MX29LV640BBXBI-90G MX29LV640BBXBI-12G P/N:PM1076 MX29LV640BT/BB Ball Pitch/ (ns) Ball size 90 0.8mm/0.3mm 120 0.8mm/0.3mm 90 0.8mm/0.3mm 120 0.8mm/0.3mm 90 0.8mm/0.3mm 120 0.8mm/0.3mm 90 0 ...
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... PACKAGE INFORMATION P/N:PM1076 MX29LV640BT/BB 66 REV. 1.2, SEP. 07, 2005 ...
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... P/N:PM1076 MX29LV640BT/BB 67 REV. 1.2, SEP. 07, 2005 ...
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... REVISION HISTORY Revision No. Description 1.0 1. Removed "Preliminary" 1.1 1. Added "BYTE#" in Pin Description & Logic Symbol 1.2 1. Modified "RESET# TIMING WAVEFORM" P/N:PM1076 MX29LV640BT/BB Page P1 P4 P38 68 Date MAR/08/2005 MAR/22/2005 SEP/07/2005 REV. 1.2, SEP. 07, 2005 ...
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... MX29LV640BT/BB MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...