MX29LV320CB Macronix International, MX29LV320CB Datasheet - Page 15

• Manufacturer Part Number: MX29LV320CB
• Description: 32M-BIT [4M x 8 / 2M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY
• Manufacturer: Macronix International

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MX29LV320C T/B
LOGICAL INHIBIT
Writing is inhibited by holding any one of OE# = VIL, CE#
= VIH or WE# = VIH. To initiate a write cycle CE# and
WE# must be a logical zero while OE# is a logical one.
POWER-UP SEQUENCE
The MX29LV320C T/B powers up in the Read only mode.
In addition, the memory contents may only be altered
after successful completion of the predefined command
sequences.
POWER-UP WRITE INHIBIT
If WE#=CE#=VIL and OE#=VIH during power up, the
device does not accept commands on the rising edge of
WE#. The internal state machine is automatically reset
to the read mode on power-up.
POWER SUPPLY DECOUPLING
In order to reduce power switching effect, each device
should have a 0.1uF ceramic capacitor connected be-
tween its VCC and GND.
SOFTWARE COMMAND DEFINITIONS
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing them
in the improper sequence will reset the device to the
read mode. Table 3 defines the valid register command
sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while the
Sector Erase operation is in progress. Either of the two
reset command sequences will reset the device (when
applicable).
All addresses are latched on the falling edge of WE# or
CE#, whichever happens later. All data are latched on
rising edge of WE# or CE#, whichever happens first.
P/N:PM1188
REV. 1.0, AUG. 02, 2005
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