MX26LV800T Macronix, MX26LV800T Datasheet - Page 6

• Manufacturer Part Number: MX26LV800T
• Description: 8M-Bit CMOS Single Voltage Flash Memory
• Manufacturer: Macronix

AUTOMATIC PROGRAMMING
The MX26LV800T/B is word/byte programmable using
the Automatic Programming algorithm. The Automatic
Programming algorithm makes the external system do
not need to have time out sequence nor to verify the
data programmed. The typical chip programming time
at room temperature of the MX26LV800T/B is less than
35 seconds.
AUTOMATIC PROGRAMMING ALGORITHM
MXIC's Automatic Programming algorithm requires the
user to only write program set-up commands (including
2 unlock write cycle and A0H) and a program command
(program data and address). The device automatically
times the programming pulse width, provides the pro-
gram verification, and counts the number of sequences.
A status bit similar to DATA# polling and a status bit
toggling between consecutive read cycles, provide feed-
back to the user as to the status of the programming
operation. Refer to write operation status, table 7, for more
information on these status bits.
AUTOMATIC CHIP ERASE
The entire chip is bulk erased using 10 ms erase pulses
according to MXIC's Automatic Chip Erase algorithm.
Typical erasure at room temperature is accomplished in
less than 40 second. The Automatic Erase algorithm
automatically programs the entire array prior to electri-
cal erase. The timing and verification of electrical erase
are controlled internally within the device.
AUTOMATIC SECTOR ERASE
The MX26LV800T/B is sector(s) erasable using MXIC's
Auto Sector Erase algorithm. The Automatic Sector
Erase algorithm automatically programs the specified
sector(s) prior to electrical erase. The timing and verifi-
cation of electrical erase are controlled internally within
the device. An erase operation can erase one sector,
multiple sectors, or the entire device.
AUTOMATIC ERASE ALGORITHM
MXIC's Automatic Erase algorithm requires the user to
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write commands to the command register using stan-
dard microprocessor write timings. The device will auto-
matically pre-program and verify the entire array. Then
the device automatically times the erase pulse width,
provides the erase verification, and counts the number
of sequences. A status bit toggling between consecu-
tive read cycles provides feedback to the user as to the
status of the erasing operation.
Register contents serve as inputs to an internal state-
machine which controls the erase and programming cir-
cuitry. During write cycles, the command register inter-
nally latches address and data needed for the program-
ming and erase operations. During a system write cycle,
addresses are latched on the falling edge, and data are
latched on the rising edge of WE# or CE#, whichever
happens first.
MXIC's high speed Flash technology combines years of
EPROM experience to produce the highest levels of
quality, reliability, and cost effectiveness. The
MX26LV800T/B electrically erases all bits simulta-
neously using Fowler-Nordheim tunneling. The bytes are
programmed by using the EPROM programming mecha-
nism of hot electron injection.
During a program cycle, the state-machine will control
the program sequences and command register will not
respond to any command set. After the state machine
has completed its task, it will allow the command regis-
ter to respond to its full command set.
AUTOMATIC SELECT
The auto select mode provides manufacturer and de-
vice identification, through identifier codes output on
Q7~Q0. This mode is mainly adapted for programming
equipment on the device to be programmed with its pro-
gramming algorithm. When programming by high voltage
method, automatic select mode requires VID (11V to
12V) on address pin A9 and other address pin A6, A1
and A0 as referring to Table 3. In addition, to access the
automatic select codes in-system, the host can issue
the automatic select command through the command
register without requiring VID, as shown in table 5.
MX26LV800T/B
REV. 1.2, JUL. 08, 2004