OM4068 Philips Semiconductors, OM4068 Datasheet - Page 9
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OM4068
Manufacturer Part Number
OM4068
Description
LCD driver for low multiplex rates
Manufacturer
Philips Semiconductors
Datasheet
1.OM4068.pdf
(28 pages)
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Philips Semiconductors
Power-on reset
The on-chip power-on reset block initializes the chip after
power-on or power failures. The OM4068 resets to a
starting condition as follows:
Data transfers on the serial bus should be avoided for
0.5 ms following power-on to allow completion of the reset
action.
Power-down
After power-on the chip is in power-down mode as long as
the serial clock is not active. During power-down all static
currents are switched off (no internal oscillator, no timing
and no bias level generation) and all LCD-outputs are
3-stated. The power-on reset functions remain enabled.
The power-down mode is disabled at the first rising edge
of the serial clock SCLK.
LCD bias voltage generator
The intermediate bias voltages for the LCD display are
generated on-chip. This removes the need for an external
resistive bias chain and significantly reduces the system
power consumption. The full-scale LCD voltage V
equals V
the LCD threshold voltage (V
levels.
Fractional LCD biasing voltages are obtained from an
internal voltage divider of three series resistors (
connected between V
be switched out of the circuit to provide a
level for the 1 : 2 multiplex configuration.
1998 Jun 18
All backplane and segment outputs are set to V
(display off)
All shift registers and latches are set in 3-state
SDOUT (allowing serial cascading) is set to logic 0 (with
SCE LOW)
Power-down mode.
LCD driver for low multiplex rates
LCD
V
SS
. The optimum value of V
LCD
and V
th
) and the number of bias
SS
. The centre resistor can
1
OP
2
bias voltage
depends on
1
3
OP
SS
bias)
9
The bias levels depend on the multiplex rate and are
selected automatically when the display configuration is
selected using M1 and M0.
LCD voltage selector
The LCD voltage selector (control logic) coordinates the
multiplexing of the LCD in accordance with the selected
drive or display configuration. The operation of the voltage
selector is controlled by the input pins M0 and M1
(see Table 2).
Table 2 Drive mode selection
For multiplex rates of 1 : 2 three bias levels are used
including V
1 : 3 multiplex rate. The various biasing configurations
together with the biasing characteristics as functions of
V
(D), are given in Table 3.
A practical value for V
V
typically when the LCD exhibits approximately 10%
contrast. In static mode a suitable choice is V
OP
off(rms)
M1
0
0
1
1
= V
with a defined LCD threshold voltage (V
LCD
LCD
M0
0
1
0
1
V
and V
SS
test mode (not user accessible)
static drive (1 : 1)
duplex drive (1 : 2)
triplex drive (1 : 3)
and the resulting discrimination ratios
SS
OP
. Four bias level are used for the
is determinated by equating
DRIVE MODE
Product specification
OM4068
OP
th
> 3V
),
th
.