MBM29LV004TC Fujitsu Media Devices, MBM29LV004TC Datasheet - Page 24

• Manufacturer Part Number: MBM29LV004TC
• Description: 4M (512K X 8) BIT
• Manufacturer: Fujitsu Media Devices

24
MBM29LV004TC
Data Protection
Low V
Write Pulse “Glitch” Protection
Logical Inhibit
Power-Up Write Inhibit
Handling of SON Package
The MBM29LV004TC/BC are designed to offer protection against accidental erasure or programming caused
by spurious system level signals that may exist during power transitions. During power up the devices
automatically reset the internal state machine in the Read mode. Also, with its control register architecture,
alteration of the memory contents only occurs after successful completion of specific multi-bus cycle command
sequences.
The devices also incorporate several features to prevent inadvertent write cycles resulting form V
and power-down transitions or system noise.
To avoid initiation of a write cycle during V
than 2.3 V (typically 2.4 V). If V
are disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until
the V
to prevent unintentional writes when V
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used.
Noise pulses of less than 5 ns (typical) on OE, CE, or WE will not initiate a write cycle.
Writing is inhibited by holding any one of OE = V
must be a logical zero while OE is a logical one.
Power-up of the devices with WE = CE = V
pulse. The internal state machine is automatically reset to the read mode on power-up.
The metal portion of marking side is connected with internal chip electrically. Please pay attention not to occur
electrical connection during operation. In worst case, it may be caused permanent damage to device or system
by excessive current.
CC
CC
Write Inhibit
level is greater than V
LKO
CC
-70/-90/-12
. It is the users responsibility to ensure that the control pins are logically correct
< V
LKO
, the command register is disabled and all internal program/erase circuits
CC
is above 2.3 V.
CC
IL
and OE = V
power-up and power-down, a write cycle is locked out for V
/MBM29LV004BC
IL
, CE = V
IH
will not accept commands on the rising edge of write
IH
, or WE = V
IH
. To initiate a write cycle CE and WE
-70/-90/-12
CC
power-up
CC
less