SC16IS762 Philips Semiconductors, SC16IS762 Datasheet - Page 32

• Manufacturer Part Number: SC16IS762
• Description: (SC16IS752 / SC16IS762) Dual UART
• Manufacturer: Philips Semiconductors

NXP Semiconductors
SC16IS752_SC16IS762_6
Product data sheet
8.19 Extra Features Control Register (EFCR)
8.20 Division registers (DLL, DLH)
Table 30.
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These are two 8-bit registers which store the 16-bit divisor for generation of the baud clock
in the baud rate generator. DLH stores the most significant part of the divisor. DLL stores
the least significant part of the divisor.
Note that DLL and DLH can only be written to before Sleep mode is enabled (before
IER[4] is set).
Bit
7
6
5
4
3
2
1
0
For SC16IS762 only.
Symbol
IRDA MODE
-
RTSINVER
RTSCON
-
TXDISABLE
RXDISABLE
9-BIT MODE
Extra Features Control Register bits description
Rev. 06 — 19 December 2006
Dual UART with I
Description
IrDA mode.
reserved
Invert RTS signal in RS-485 mode.
Enable the transmitter to control the RTS pin.
reserved
Disable transmitter. UART does not send serial data out on the
transmit pin, but the transmit FIFO will continue to receive data from
host until full. Any data in the TSR will be sent out before the
transmitter goes into disable state.
Disable receiver. UART will stop receiving data immediately once this
bit is set to 1, and any data in the TSR will be sent to the receive FIFO.
User is advised not to set this bit during receiving.
Enable 9-bit or Multidrop mode (RS-485).
0 = IrDA SIR,
1 = IrDA SIR,
0: RTS = 0 during transmission and RTS = 1 during reception
1: RTS = 1 during transmission and RTS = 0 during reception
0: transmitter does not control RTS pin
1: transmitter controls RTS pin
0: transmitter is enabled
1: transmitter is disabled
0: receiver is enabled
1: receiver is disabled
0: normal RS-232 mode
1: enables RS-485 mode
3
1
16
4
2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
pulse ratio, data rate up to 1.152 Mbit/s
pulse ratio, data rate up to 115.2 kbit/s
© NXP B.V. 2006. All rights reserved.
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