LTC6403-1 Linear Technology, LTC6403-1 Datasheet - Page 9

• Manufacturer Part Number: LTC6403-1
• Description: Low Power Fully Differential Input/Output Amplifier/Driver
• Manufacturer: Linear Technology

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PIN FUNCTIONS
V
The voltage on V
level (which is defi ned as the average of the voltages on
the +OUT and –OUT pins). The V
of an internal resistive voltage divider between V
V
to maximize output signal swing. The V
overdriven by an external voltage reference capable of
driving the input impedance presented by the V
On the LTC6403-1, the V
of approximately 23k to a mid-supply potential. The V
pin should be bypassed with a high quality ceramic bypass
capacitor of at least 0.01μF, (unless you are using split
supplies, then connect directly to a low impedance, low
noise ground plane) to minimize common mode noise
from being converted to differential noise by impedance
mismatches both external and internal to the IC.
NC (Pins 5, 16): No Connection. These pins are not con-
nected internally.
BLOCK DIAGRAM
OCM
–
that develops a (default) mid-supply voltage potential
(Pin 4): Output Common Mode Reference Voltage.
OCM
sets the output common mode voltage
OCM
1
2
3
4
SHDN
V
V
V
+
–
OCM
pin has an input resistance
V
V
+
–
V
V
V
V
OCM
+
–
+
–
V
pin is the midpoint
+
66k
46k
46k
OCM
16
5
V
V
+
–
NC
NC
pin can be
V
V
–
–
OCM
+
OCM
and
pin.
15
6
+IN
–IN
–
+
V
OCM
V
V
–
–
V
V
+OUT, –OUT (Pins 7, 14): Unfi ltered Output Pins. Each
amplifi er output is designed to drive a load capacitance of
10pF. This means the amplifi er can drive 10pF from each
output to ground or 5pF differentially. Larger capacitive
loads should be decoupled with at least 25Ω resistors
from each output.
+OUTF, –OUTF (Pins 8, 13): Filtered Output Pins. These
pins have a series 100Ω resistor connected between the
fi ltered and unfi ltered outputs and three 12pF capacitors.
Both +OUTF, and –OUTF have 12pF to V
ditional 12pF differentially between +OUTF and –OUTF.
This fi lter creates a differential low pass pole with a –3dB
bandwidth of 44.2MHz.
+IN, –IN (Pins 15, 6): Non-Inverting and Inverting Input
pins of the amplifi er, respectively. For best performance,
it is highly recommended that stray capacitance be kept
to an absolute minimum by keeping printed circuit con-
nections as short as possible and stripping back nearby
surrounding ground plane away from these pins.
Exposed Pad (Pin 17): Tie the pad to V
If split supplies are used, do not tie the pad to ground.
+
+
14
7
–OUT
+OUT
V
V
100Ω
100Ω
–
–
V
V
+
+
12pF
13
8
–OUTF
+OUTF
12pF
12pF
V
V
V
+
+
+
V
V
–
–
64031 BD
V
V
V
V
–
+
+
–
12
11
10
9
LTC6403-1
–
(Pins 3, 9, and 12).
–
, plus an ad-
64031f
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