LTC4214-2 Linear Technology, LTC4214-2 Datasheet - Page 26
LTC4214-2
Manufacturer Part Number
LTC4214-2
Description
Negative Low Voltage Hot Swap Controllers
Manufacturer
Linear Technology
Datasheet
1.LTC4214-2.pdf
(32 pages)
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APPLICATIO S I FOR ATIO
LTC4214-1/LTC4214-2
Resetting a Fault Latch (LTC4214-1)
The latched circuit breaker fault of LTC4214-1 benefits
from long cooling time. It is reset by pulling the UV pin
below V
plished by pulling the V
V
below V
is skipped if TIMER is used for reset. An initial timing cycle
is generated if reset by the UV pin or the V
26
LKH
). A third reset method involves pulling the TIMER pin
UVHI
TMRL
– V
as shown in Figure 14. An initial timing cycle
UVHST
Figure 14. Pushbutton Reset of LTC4214-1’s Latched Fault (All Waveforms are Referenced to V
U
with a switch. Reset is also accom-
IN
pin momentarily below (V
U
PWRGD
TIMER
SENSE
DRAIN
GATE
W
SS
5 A
20 • (V
MOMENTARY DPST SWITCH RESET
20 • (V
SWITCH RESETS LATCHED TIMER
1
IN
V
ACL
CB
GATEL
20 • V
V
V
pin.
TMRH
TMRL
+ V
+ V
U
GATE START-UP
OS
OS
OS
40 A + 8 • I
50 A
)
)
SWITCH RELEASES SS
2 34
LKO
–
DRN
5
50 A
67 8 9
The duration of the TIMER reset pulse should be smaller
than the time taken to reach 0.2V at SS pin. With a single
pole mechanical pushbutton switch, this may not be
feasible. A double pole, single throw pushbutton switch
removes this restriction by connecting the second switch
to the SS pin. With this method, both the SS and TIMER
pins are released at the same time.
V
V
V
V
V
IN
ACL
CB
DRNCL
DRNL
– V
5 A
GATEH
5 A
4214 F14
EE
)
421412f