LTC4008 Linear Technology, LTC4008 Datasheet - Page 9

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LTC4008

Manufacturer Part Number
LTC4008
Description
Multi-Chemistry Battery Charger
Manufacturer
Linear Technology
Datasheet

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OPERATIO
Input FET (LTC4008)
The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLP pin
and provides the logic indicator of AC present on the
ACP/SHDN pin. It controls the gate of the input FET to keep
a low forward voltage drop when charging and also
prevents reverse current flow through the input FET.
If the input voltage is less than V
170mV higher than V
occurs the ACP/SHDN pin is released and pulled up with
an external load to indicate that the adapter is present. The
gate of the input FET is driven to a voltage sufficient to keep
a low forward voltage drop from drain to source. If the
voltage between DCIN and CLP drops to less than 25mV,
the input FET is turned off slowly. If the voltage between
DCIN and CLP is ever less than – 25mV, then the input FET
is turned off in less than 10µs to prevent significant
reverse current from flowing in the input FET. In this
condition, the ACP/SHDN pin is driven low and the charger
is disabled.
Input FET (LTC4008-1)
The input FET circuit is disabled for the LTC4008-1. There
is no low current shutdown mode when DCIN falls below
the CLP pin. The ACP/SHDN pin functions only to shut
down the charger.
Battery Charger Controller
The LTC4008 charger controller uses a constant off-time,
current mode step-down architecture. During normal op-
eration, the top MOSFET is turned on each cycle when the
oscillator sets the SR latch and turned off when the main
current comparator I
MOSFET is off, the bottom MOSFET is turned on until
either the inductor current trips the current comparator
I
the equation:
to set the bottom MOSFET on time. This activity is dia-
grammed in Figure 1.
REV
t
OFF
or the beginning of the next cycle. The oscillator uses
=
V
V
DCIN
DCIN
U
V
f
OSC
BAT
CLN
CMP
to activate the charger. When this
resets the SR latch. While the top
CLP
, it must go at least
BGATE
The peak inductor current, at which I
latch, is controlled by the voltage on I
controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
voltage between CSP and BAT to a representative current.
Error amp CA2 compares this current against the desired
current programmed by R
adjusts I
therefore,
The voltage at BATMON is divided down by an external
resistor divider and is used by error amp EA to decrease
I
When the charging current begins to decrease, the voltage
at PROG will decrease in direct proportion. The voltage at
PROG is then given by:
The accuracy of V
V
The amplifier CL1 monitors and limits the input current,
normally from the AC adapter to a preset level (100mV/
R
voltage, thereby reducing charging current. The I
tor output will go low when this condition is detected and
the FLAG indicator will be inhibited if it is not already low.
TGATE
V
INDUCTOR
TH
CURRENT
PROG
PROG
CL
I
R
CHARGE MAX
). At input current limit, CL1 will decrease the I
if the divider voltage is above the 1.19V reference.
V
PROG
OFF
OFF
ON
ON
REF
is plotted in Figure 2.
=
TH
(
I
CHARGE
=
(
until:
V
CSP
)
=
PROG
R
R
V
SENSE
V
BAT
PROG
TRIP POINT SET BY ITH VOLTAGE
REF
will range from 0% to I
Figure 1
t
+
3 01
OFF
+
.
PROG
11 67
11 67
11 67
k
.
.
.
at the PROG pin and
µ
µ
A
µ
A
A
• .
• .
CMP
3 01
3 01
LTC4008
TH
. I
R
3 01
resets the SR
k
k
.
SENSE
TH
)
k
TOL
is in turn
CL
3 01
R
indica-
.
.
PROG
4008 F01
4008fa
9
k
TH

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