LTC4006 Linear Technology, LTC4006 Datasheet - Page 14

• Manufacturer Part Number: LTC4006
• Description: Standalone Li-Ion Battery Charger
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
LTC4006
Example #1: 10k NTC with custom limits
Example #2: 100k NTC
Example #3: 22k PTC
Sizing the Thermistor Hold Capacitor
During the hold interval, C7 must hold the voltage across
the thermistor relatively constant to avoid false readings.
A reasonable amount of ripple on NTC during the hold
interval is about 10mV to 15mV. Therefore, the value of C7
is given by:
Example:
14
TLOW = 0 C, THIGH = 50 C
R
R
R
R9 = 24.55k
R9A = 99.6k
TLOW = 5 C, THIGH = 50 C
R
R
R
R9 = 226.9k
R9A = 1.365M
TLOW = 0 C, THIGH = 50 C
R
R
R
R9 = 43.9k
R9A = 154k
C7 = t
R9 = 24.3k
R
C7 = 0.58 F
TH
TH(LOW)
TH(HIGH)
TH
TH(LOW)
TH(HIGH)
TH
TH(LOW)
TH(HIGH)
RT
= 10 • R
= 10k at 25 C,
= 100k at 25 C,
= 309k (~2 hour timer)
= 22k at 25 C,
Figure 10. Voltage Divider Thermistor Network
HOLD
= 32.582k at 0 C
= 272.05k at 5 C
= 6.53k at 0 C
= 3.635k at 50 C
= 33.195k at 50 C
= 61.4k at 50 C
RT
/(R9/7 • –ln(1 – 8 • 15mV/4.5V))
LTC4006
• 17.5pF/(R9/7 • – ln(1 – 8 • 15mV/4.5V)
44.2k (nearest 1% value)
NTC
0.56 F (nearest value)
24.3k (nearest 1% value)
226k (nearest 1% value)
100k (nearest 1% value)
U
1.37M (nearest 1% value)
U
R9
C7
W
4006 F10
R
TH
U
Disabling the Thermistor Function
If the thermistor is not needed, connecting a resistor
between DCIN and NTC will disable it. The resistor should
be sized to provide at least 10 A with the minimum voltage
applied to DCIN and 10V at NTC. Do not exceed 30 A into
NTC. Generally, a 301k resistor will work for DCIN less
than 15V. A 499k resistor is recommended for DCIN
between 15V and 24V.
PCB Layout Considerations
For maximum efficiency, the switch node rise and fall times
should be minimized. To prevent magnetic and electrical
field radiation and high frequency resonant problems,
proper layout of the components connected to the IC is
essential. (See Figure 12.) Here is a PCB layout priority list
for proper layout. Layout the PCB using this specific order.
1. Input capacitors need to be placed as close as possible
2. The control IC needs to be close to the switching FET’s
3. Place inductor input as close as possible to switching
4. Place the output current sense resistor right next to
to switching FET’s supply and ground connections.
Shortest copper trace connections possible. These
parts must be on the same layer of copper. Vias must
not be used to make this connection.
gate terminals. Keep the gate drive signals short for a
clean FET drive. This includes IC supply pins that con-
nect to the switching FET source pins. The IC can be
placed on the opposite side of the PCB relative to above.
FET’s output connection. Minimize the surface area of
this trace. Make the trace width the minimum amount
needed to support current—no copper fills or pours.
Avoid running the connection using multiple layers in
parallel. Minimize capacitance from this node to any
other trace or plane.
the inductor output but oriented such that the IC’s
Figure 11. General Thermistor Network
LTC4006
NTC
R9
C7
R9A
4006 F11
R
TH
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