LTC3872 Linear Technology, LTC3872 Datasheet - Page 14

• Manufacturer Part Number: LTC3872
• Description: No RSENSE Current Mode Boost DC/DC Controller
• Manufacturer: Linear Technology

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APPLICATIO S I FOR ATIO
LTC3872
3. Assuming a MOSFET junction temperature of 125°C,
the room temperature MOSFET R
than:
The MOSFET used was the Si3460, which has a maximum
R
30V, and a gate charge of 13.5nC at 4.5V V
4. The diode for this design must handle a maximum DC
output current of 2A and be rated for a minimum reverse
voltage of V
conductor (MBRB2515L) was chosen for its high power
dissipation capability.
5. The output capacitor usually consists of a lower valued,
low ESR ceramic.
6. The choice of an input capacitor for a boost converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design two 22μF Taiyo Yuden ceramic
14
DS(ON)
R
=
DS ON
0 175
.
(
of 27mΩ at 4.5V V
)
V
≤
OUT
•
V
⎛
⎝ ⎜
SENSE MAX
, or 5V. A 25A, 15V diode from On Semi-
1
+
U
0 4
(
1 0 39
2
.
– .
⎞
⎠ ⎟
•
)
U
2
•
BOLD LINES INDICATE HIGH CURRENT PATHS
A
⎛
⎝ ⎜
R
GS
ITH
C
1
Figure 7. LTC3872 Layout Diagram (See PC Board Layout Checklist)
• .
ITH
+
1 5
, a BV
χ
2
R1
1
DS(ON)
⎞
⎠ ⎟
≈
W
–
•
30
DSS
D
I
O MAX
MAX
m
(
Ω
of greater than
should be less
IPRG
I
V
GND
TH
FB
GS
) )
•
.
LTC3872
ρ
U
R2
T
RUN/SS
NGATE
SW
V
IN
capacitors (JMK325BJ226MM) is required (the input
and return lead lengths are kept to a few inches. As with
the output node, check the input ripple with a single
oscilloscope probe connected across the input capacitor
terminals.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3872. These items are illustrated graphically in
the layout diagram in Figure 7. Check the following in
your layout:
1. The Schottky diode should be closely connected be-
tween the output capacitor and the drain of the external
MOSFET.
2. The input decoupling capacitor (0.1μF) should be con-
nected closely between V
3. The trace from SW to the switch point should be kept
short.
4. Keep the switching node NGATE away from sensitive
small signal nodes.
5. The V
resistors. The resistive divider R1 and R2 must be con-
nected between the (+) plate of C
+
FB
C
IN
L1
pin should connect directly to the feedback
+
D1
C
OUT
3872 F07
IN
M1
and GND.
V
V
OUT
IN
OUT
and signal ground.
3872fa