LTC3727-1 Linear Technology, LTC3727-1 Datasheet - Page 18
![no-image](/images/manufacturer_photos/0/3/388/linear_technology_sml.jpg)
LTC3727-1
Manufacturer Part Number
LTC3727-1
Description
2-Phase Synchronous Step-Down Switching Regulators
Manufacturer
Linear Technology
Datasheet
1.LTC3727-1.pdf
(32 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC3727-1EG
Manufacturer:
LT
Quantity:
13
APPLICATIO S I FOR ATIO
LTC3727/LTC3727-1
than 7.5V. This can be done with the inductive boost
winding as shown in Figure 6.
Topside MOSFET Driver Supply (C
External bootstrap capacitors C
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor C
external diode D
When one of the topside MOSFETs is to be turned on, the
driver places the C
desired MOSFET. This enhances the MOSFET and turns on
the topside switch. The switch node voltage, SW, rises to
V
on, the boost voltage is above the input supply: V
V
to be 100 times that of the total input capacitance of the
topside MOSFET(s). The reverse breakdown of the exter-
nal Schottky diode must be greater than V
adjusting the gate drive level, the final arbiter is the total
input current for the regulator. If a change is made and the
input current decreases, then the efficiency has improved.
If there is no change in input current, then there is no
change in efficiency.
18
IN
IN
and the BOOST pin follows. With the topside MOSFET
+ V
Figure 6. Secondary Output Loop & EXTV
R6
R5
INTVCC
OPTIONAL EXTV
CONNECTION
7.5V < V
EXTV
FCB
SGND
B
CC
LTC3727
in the functional diagram is charged though
. The value of the boost capacitor C
SEC
< 8.5V
B
PGND
CC
B
from INTV
TG1
BG1
SW
U
V
voltage across the gate-source of the
IN
N-CH
N-CH
U
V
CC
IN
+
B
when the SW pin is low.
connected to the BOOST
1:N
C
T1
W
IN
B
, D
B
CC
R
)
SENSE
Connection
IN(MAX)
V
SEC
U
+
+
B
BOOST
. When
3727 F06
needs
1 F
C
V
OUT
OUT
=
Output Voltage
The LTC3727 output voltages are each set by an external
feedback resistive divider carefully placed across the
output capacitor. The resultant feedback signal is
compared with the internal precision 0.800V voltage
reference by the error amplifier. The output voltage is
given by the equation:
where R1 and R2 are defined in Figure 2.
SENSE
The common mode input range of the current comparator
sense pins is from 0V to 14V. Continuous linear operation
is guaranteed throughout this range allowing output volt-
age setting from 0.8V to 14V. A differential NPN input
stage is biased with internal resistors from an internal
2.4V source as shown in the Functional Diagram. This
requires that current either be sourced or sunk from the
SENSE pins depending on the output voltage. If the output
voltage is below 2.4V current will flow out of both SENSE
pins to the main output. The output can be easily preloaded
by the V
comparator’s negative input bias current. The maximum
current flowing out of each pair of SENSE pins is:
Since V
can choose R1 in Figure 2 to have a maximum value to
absorb this current.
I
for V
R
V
SENSE
OUT
1
(
MAX
+
OSENSE
OUT
OUT
/SENSE
+
)
+ I
0 8
resistive divider to compensate for the current
< 2.4V
.
SENSE
24
V
is servoed to the 0.8V reference voltage, we
–
k
1
Pins
–
2 4
.
= (2.4V – V
R
R
2
1
V V
0 8
.
–
V
OUT
OUT
www.DataSheet4U.com
)/24k
3727f