LTC3709 Linear Technology, LTC3709 Datasheet - Page 13

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LTC3709

Manufacturer Part Number
LTC3709
Description
No RSENSE Synchronous DC/DC Controller
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC3709 is operating in
continuous mode, the duty cycles for the MOSFETs are:
The maximum power dissipation in the MOSFETs per
channel is:
Both top and bottom MOSFETs have I
MOSFET includes an additional term for transition losses,
which are the largest at maximum input voltages. The
P
P
BOT
TOP
D
D
BOT
TOP
=
=
D
( . ) •
R
D
0 5
=
=
BOT
TOP
DS ON DRV
2.0
1.5
1.0
0.5
V
V
(
0
– 50
V
IN
OUT
IN
Figure 1. R
V
)_
V
IN
I
I
IN
OUT MAX
OUT MAX
V
2
OUT
JUNCTION TEMPERATURE (°C)
U
(
(
2
2
0
I
OUT
(
DRV
2
DS(ON)
)
)
U
2
2
CC
50
C
vs Temperature
ρ
ρ
RSS
1
T BOT
T TOP
V
(
(
GS TH
100
• •
W
(
f
2
)
)
R losses and the top
• •
)
R
R
)
3709 F01
DS ON MAX
DS ON MAX
+
150
(
(
V
GS TH
)(
)(
1
U
(
)
)
)
+
bottom MOSFET losses are the greatest when the bottom
duty cycle is near 100%, during a short circuit or at high
input voltage. A much smaller and much lower input
capacitance MOSFET should be used for the top MOSFET
in applications that have an output voltage that is less than
1/3 of the input voltage. In applications where V
the top MOSFETs’ “on” resistance is normally less impor-
tant for overall efficiency than its input capacitance at
operating frequencies above 300kHz. MOSFET manufac-
turers have designed special purpose devices that provide
reasonably low “on” resistance with significantly reduced
input capacitance for the main switch application in switch-
ing regulators.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage.
The operating frequency of LTC3709 applications is deter-
mined implicitly by the one-shot timer that controls the on
time, t
the current into the I
Tying a resistor from V
inversely proportional to V
results in approximately constant frequency operation as
the input supply varies:
PLL and Frequency Synchronization
In the LTC3709, there are two on-chip phase-lock loops
(PLLs). One of the PLLs is used to achieve frequency
locking and phase separation between the two channels
while the second PLL is for locking onto an external clock.
Since the LTC3709 is a constant on-time architecture, the
error signal generated by the phase detector of the PLL is
t
f
ON
=
ON
0 7
=
. •
, of the top MOSFET switch. The on-time is set by
I
0 7
ION
.
R
V
ON
(
OUT
30
(
pF
30
pF
)
ON
)
IN
pin according to:
to the I
IN
. For a down converter, this
ON
pin yields an on-time
LTC3709
IN
>> V
13
OUT
3709f
,

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