LTC3407A-2 Linear Technology, LTC3407A-2 Datasheet - Page 13

• Manufacturer Part Number: LTC3407A-2
• Description: Dual Synchronous 800mA2.25MHz Step-Down DC/DC Regulator
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
Choosing the next highest standardized inductor value of
2.2μH, results in a maximum ripple current of:
For cost reasons, a ceramic capacitor will be used. C
selection is then based on load step droop instead of ESR
requirements. For a 5% output droop:
The closest standard value is 10μF. Since the output
impedance of a Li-Ion battery is very low, C
10μF.
The output voltage can now be programmed by choosing
the values of R1 and R2. To maintain high efficiency, the
current in these resistors should be kept small. Choosing
2μA with the 0.6V feedback voltage makes R1~300k. A
close standard 1% resistor is 280k, and R2 is then 887k.
The POR pin is a common drain output and requires a pull-
up resistor. A 100k resistor is used for adequate speed.
Figure 3 shows the complete schematic for this design
example. The specific passive components chosen allow
for a 1mm height power supply that maintains a high
efficiency across load.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
C
Δ =
OUT
I
L
≈
2 25
2 5
.
.
MHz
2 25
2 5
.
.
V
MHz
• .
U
2 2
800
μ
• ( % • .
H
U
mA
5
•
V
BOLD LINES INDICATE HIGH CURRENT PATHS
OUT2
⎛
⎝ ⎜
Figure 2. LTC3407A-2 Layout Diagram (See Board Layout Checklist)
1
−
2 5
2 5
4 2
.
.
V
W
C
OUT2
)
V
V
=
⎞
⎠ ⎟
7 1
V
C5
R4
=
IN
.
204
μ
IN
F
is typically
m
U
C
A A
IN
R3
L2
OUT
RUN/SS2 V
MODE/SYNC
SW2
V
FB2
LTC3407A-2
LTC3407A-2. These items are also illustrated graphically
in the layout diagram of Figure 2. Check the following in
your layout:
1. Does the capacitor C
and GND (exposed pad) as closely as possible? This
capacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. Are C
C
3. The resistor divider formed by R1 and R2 must be
connected between the (+) plate of C
sense line terminated near GND (exposed pad). The feed-
back signals V
noisy components and traces, such as the SW lines (Pins
4 and 7), and their traces should be minimized.
4. Keep sensitive components away from the SW pins. The
input capacitor C
routed away from the SW traces and the inductors.
5. A ground plane is preferred, but if not available keep the
signal and power grounds segregated with small signal
components returning to the GND pin at one point.
Addtionally the two grounds should not share the high
current paths of C
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise of
power components. These copper areas should be con-
nected to V
GND
IN
OUT
RUN/SS1
returns current to GND and the (–) plate of C
SW1
POR
V
FB1
OUT
IN
R1
and L1 closely connected? The (–) plate of
or GND.
FB1
L1
C4
R2
IN
IN
and V
and the resistors R1 to R4 should be
3407A2 F02
or C
IN
FB2
OUT
connect to the power V
C
V
OUT1
OUT1
should be routed away from
.
LTC3407A-2
www.DataSheet4U.com
OUT
and a ground
IN
13
(Pin 3)
IN
3407a2f
.