LTC3407-3 Linear Technology, LTC3407-3 Datasheet - Page 10

• Manufacturer Part Number: LTC3407-3
• Description: Dual Synchronous 1.8V/0.8A and 3.3V/0.8A 2.25MHz Step-Down DC/DC Regulator
• Manufacturer: Linear Technology

Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough to
support the load. The time required for the feedback loop
to respond is dependent on the compensation and the
output capacitor size. Typically, 3-4 cycles are required to
respond to a load step, but only in the first cycle does the
output drop linearly. The output droop, V
about 2-3 times the linear drop of the first cycle. Thus, a
good place to start is with the output capacitor size of
approximately:
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely re-
quired to supply high frequency bypassing, since the
impedance to the supply is very low. A 10µF ceramic
capacitor is usually enough for these conditions.
Power-On Reset
The POR pin is an open-drain output which pulls low when
either regulator is out of regulation. When both output
voltages are above –8.5% of regulation, a timer is started
which releases POR after 2
This delay can be significantly longer in Burst Mode
operation with low load currents, since the clock cycles
only occur during a burst and there could be milliseconds
of time between bursts. This can be bypassed by tying the
POR output to the MODE/SYNC input, to force pulse
skipping mode during a reset. In addition, if the output
voltage faults during Burst Mode sleep, POR could have a
slight delay for an undervoltage output condition and may
not respond to an overvoltage output. This can be avoided
by using pulse skipping mode instead. When either chan-
nel is shut down, the POR output is pulled low, since one
or both of the channels are not in regulation.
Mode Selection & Frequency Synchronization
The MODE/SYNC pin is a multipurpose pin which pro-
vides mode selection and frequency synchronization.
LTC3407-3
APPLICATIO S I FOR ATIO
10
C
OUT
≈
2 5 .
f
O
•
∆
V
I
OUT
DROOP
U
U
18
clock cycles (about 117ms).
W
DROOP
, is usually
U
Connecting this pin to V
which provides the best low current efficiency at the cost
of a higher output voltage ripple. Connecting this pin to
ground selects pulse skipping mode, which provides the
lowest output ripple, at the cost of low current efficiency.
The LTC3407-3 can also be synchronized to an external
2.25MHz clock signal (such as the SW pin on another
LTC3407-3)by the MODE/SYNC pin. During synchroniza-
tion, the mode is set to pulse skipping and the top switch
turn-on is synchronized to the rising edge of the external
clock.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
equal to ∆I
resistance of C
discharge C
by the regulator to return V
During this recovery time, V
overshoot or ringing that would indicate a stability
problem. The initial output voltage step may not be within
the bandwidth of the feedback loop, so the standard
second-order overshoot/DC ratio cannot be used to deter-
mine phase margin.
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance. For a detailed
explanation of optimizing the compensation components,
including a review of control loop theory, refer to Applica-
tion Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1µF) input capacitors.
The discharged input capacitors are effectively put in par-
allel with C
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection, and soft-starting.
Hot Swap is registered trademark of Linear Technology Corporation.
OUT
LOAD
OUT
, causing a rapid drop in V
, generating a feedback error signal used
OUT
• ESR, where ESR is the effective series
. ∆I
OUT
IN
LOAD
immediately shifts by an amount
enables Burst Mode operation,
OUT
also begins to charge or
OUT
TM
to its steady-state value.
www.DataSheet4U.com
can be monitored for
controller is designed
OUT
. No regulator
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