LTC3407-2 Linear Technology, LTC3407-2 Datasheet - Page 11

• Manufacturer Part Number: LTC3407-2
• Description: 2.25MHz Step-Down DC/DC Regulator
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
produce the most improvement. Percent efficiency can be
expressed as:
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, 4 main sources usually account for most of the
losses in LTC3407-2 circuits: 1)V
switching losses, 3) I
1) The V
Electrical Characteristics which excludes MOSFET driver
and control currents. V
loss that increases with V
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge dQ moves from V
ground. The resulting dQ/dt is a current out of V
typically much larger than the DC bias current. In continu-
ous mode, I
gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to V
and thus their effects will be more pronounced at higher
supply voltages.
3) I
internal switches, R
continuous mode, the average output current flows through
inductor L, but is “chopped” between the internal top and
bottom switches. Thus, the series resistance looking into
the SW pin is a function of both top and bottom MOSFET
R
The R
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
4) Other ‘hidden’ losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important to
DS(ON)
%Efficiency = 100% - (L1 + L2 + L3 + ...)
R
I
2
2
R losses are calculated from the DC resistances of the
SW
R losses = I
DS(ON)
= (R
and the duty cycle (DC) as follows:
IN
current is the DC supply current given in the
GATECHG
DS(ON)TOP
for both the top and bottom MOSFETs can be
OUT2
U
= f
(R
SW
2
)(DC) + (R
IN
O
R losses, 4) other losses.
SW
(Q
, and external inductor, R
current results in a small (<0.1%)
2
R losses:
IN
T
U
+ R
+ Q
, even at no load.
L
B
)
), where Q
DS(ON)BOT
IN
W
quiescent current, 2)
T
)(1 – DC)
and Q
U
IN
B
are the
that is
IN
L
. In
to
IN
include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C
charge storage and very low ESR at the switching fre-
quency. Other losses including diode conduction losses
during dead-time and inductor core losses generally ac-
count for less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3407-2 does not
dissipate much heat due to its high efficiency. However, in
applications where the LTC3407-2 is running at high
ambient temperature with low supply voltage and high
duty cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 150°C,
both power switches will turn off and the SW node will
become high impedance.
To prevent the LTC3407-2 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
where P
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, T
As an example, consider the case when the LTC3407-2 is
in dropout on both channels at an input voltage of 2.7V
with a load current of 800mA and an ambient temperature
of 70°C. From the Typical Performance Characteristics
graph of Switch Resistance, the R
main switch is 0.425Ω. Therefore, power dissipated by
each channel is:
The MS package junction-to-ambient thermal resistance,
θ
JA
T
T
P
, is 45°C/W. Therefore, the junction temperature of the
RISE
J
D
= T
= I
D
= P
2
RISE
is the power dissipated by the regulator and θ
• R
D
+ T
DS(ON)
• θ
AMBIENT
JA
= 272mW
J
, is given by:
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DS(ON)
LTC3407-2
resistance of the
IN
has adequate
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JA