LTC2925 Linear Technology, LTC2925 Datasheet - Page 7

• Manufacturer Part Number: LTC2925
• Description: Multiple Power Supply Tracking Controller
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
Power Supply Tracking and Sequencing
The LTC2925 handles a variety of power-up profiles to
satisfy the requirements of digital logic circuits including
FPGAs, PLDs, DSPs and microprocessors. These require-
ments fall into one of the four general categories illus-
trated in Figures 1 to 4.
Some applications require that the potential difference
between two power supplies must never exceed a speci-
fied voltage. This requirement applies during power-up
and power-down as well as during steady-state operation,
often to prevent destructive latch-up in a dual supply IC.
Typically, this is achieved by ramping the supplies up and
down together (Figure 1). In other applications it is desir-
able to have the supplies ramp up and down with fixed
voltage offsets between them (Figure 2) or to have them
ramp up and down ratiometrically (Figure 3).
1V/DIV
2V/DIV
Figure 3. Ratiometric Tracking
Figure 1. Coincident Tracking
U
10ms/DIV
10ms/DIV
U
W
2925 F01
2925 F03
U
MASTER
SLAVE1
SLAVE2
SLAVE3
MASTER
SLAVE1
SLAVE2
SLAVE3
Certain applications require one supply to come up after
another. For example, a system clock may need to start
before a block of logic. In this case, the supplies are se-
quenced as in Figure 4 where the 1.8V supply ramps up
completely followed by the 2.5V supply and then the 1.5V
supply.
Operation
The LTC2925 provides a simple solution to all of the power
supply tracking and sequencing profiles shown in Figures
1 to 4. A single LTC2925 controls up to four supplies with
three “slave” supplies that track a “master” signal. With
just two resistors, a slave supply is configured to ramp up
as a function of the master signal. This master signal can
be a fourth supply that is ramped up through an external
FET, whose ramp rate is set with a single capacitor, or it can
be a signal generated by tying the GATE and RAMP pins to
an external capacitor.
1V/DIV
2V/DIV
Figure 4. Supply Sequencing
Figure 2. Offset Tracking
10ms/DIV
10ms/DIV
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LTC2925
2925 F02
2925 F04
MASTER
SLAVE1
SLAVE2
SLAVE3
SLAVE1
SLAVE2
SLAVE3
7
2925f