LTC2924 Linear Technology, LTC2924 Datasheet - Page 14

• Manufacturer Part Number: LTC2924
• Description: Quad Power Supply Sequencer
• Manufacturer: Linear Technology

LTC2924
Note that the TMR pin may take a while to reach the V
voltage. The pin is pulled to V
source used for the TMR function. The larger the timer
capacitor, the longer this will take. To estimate the amount
of time required for the TMR pin to reach V
condition, multiply the normal timer duration by V
Volts). See Figures 7 and 8 for  F  A  U  L  T pin connections
when two or more LTC2924 chips are cascaded.
Sequence Errors
The LTC2924 keeps track of power supplies that should
be on during the Power On sequence and the Power Off
sequence. The LTC2924 also monitors each IN pin after all
of the power supplies have sequenced on. If a power supply
(as monitored at the IN1-IN4 pins) goes low when it should
be high, a fault condition is detected. All four OUT pins are
pulled low and the  F  A  U  L  T pin will be pulled low.
The precision voltage threshold for detection of a sequence
error at any of the IN1-IN4 pins is the same as the normal
threshold (~0.61V). The precision voltage comparators
used in the LTC2924 employ a sampled technique to im-
prove accuracy. The sample time is approximately 20µs.
To improve the speed of detection for a sequence error, a
second high speed comparator is used for detecting a low
power supply. The voltage threshold for the high speed
comparators is approximately 0.4V (V
sensed below this threshold when a power supply should
be ON will cause a fault in ~1µs.
14
APPLICATIO S I FOR ATIO
U
U
CC
with the same 5µA current
W
ON(FAULT)
CC
). Voltages
U
in a fault
CC
(in
CC
System Controller ON Command Errors
Once the LTC2924 receives the Power On command via
the ON pin, the ON pin must remain above 0.61V until the
Power On sequence has completed (e.g.  D  O  N  E is asserted).
Removing the ON command before the LTC2924 Power On
sequence has completed is considered a fault condition.
All of the OUT1-OUT4 pins that are already high will be
pulled low and the  F  A  U  L  T pin will be pulled low.
The same is true for the Power Off sequence. If the
LTC2924 has completed the Power On sequence and the
ON pin goes low, the ON pin must remain below 0.61V
until the Power Off sequence has completed. Raising the
ON pin above 0.61V before the Power Off sequence has
completed is considered a fault condition. Any OUTn pins
that are still high will immediately be pulled low and the
 F  A  U  L  T pin will be pulled low.
Power On Timeout Errors
If the LTC2924 PGT is being used (not tied to ground) a
fault condition will be detected when the PGT pin goes
above ~1V. If this occurs during Power On, all of the
OUT1-OUT4 pins that are already high will be pulled low
and the  F  A  U  L  T pin will be pulled low.
Externally Commanded Faults
If an external circuit pulls the  F  A  U  L  T pin low, an external
fault condition is detected and all OUT pins will be pulled
low. After sensing the Externally Commanded Fault, the
LTC2924 will also pull down on the  F  A  U  L  T pin until the
conditions for clearing the fault condition exist (see Clear-
ing the Fault Condition).
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