LTC2914 Linear Technology, LTC2914 Datasheet - Page 11

• Manufacturer Part Number: LTC2914
• Description: Quad UV/OV Positive/Negative Voltage Monitor
• Manufacturer: Linear Technology

www.DataSheet4U.com
APPLICATIO S I FOR ATIO
UV/OV Timing
The LTC2914 has an adjustable timeout period (t
holds OV or UV asserted after all faults have cleared. This
assures a minimum reset pulse width allowing a settling
time delay for the monitored voltage after it has entered
the valid region of operation.
When any VH input drops below its designed threshold,
the UV pin asserts low. When all inputs recover above
their designed thresholds, the UV output timer starts. If
all inputs remain above their designed thresholds when
the timer fi nishes, the UV pin weakly pulls high. However,
if any input falls below its designed threshold during this
time-out period, the timer resets and restarts when all inputs
are above the designed thresholds. The OV output behaves
as the UV output when LATCH is high (LTC2914-1).
Selecting the UV/OV Timing Capacitor
The UV and OV timeout period (t
is adjustable to accommodate a variety of applications.
Connecting a capacitor, C
ground sets the timeout period. The value of capacitor
needed for a particular timeout period is:
The Reset Timeout Period vs Capacitance graph found in
the Typical Performance Characteristics shows the desired
delay time as a function of the value of the timer capacitor
that must be used. The TMR pin must have a minimum of
10pF or be tied to V
limitation is the availability of a large value capacitor with
low leakage. Capacitor leakage current must not exceed
the minimum TMR charging current of 1.3µA. Tying the
TMR pin to V
C
TMR
= t
UOTO
CC
bypasses the timeout period.
• 115 • 10
U
CC
. For long timeout periods, the only
TMR
U
–9
, between the TMR pin and
(F/s)
UOTO
W
) for the LTC2914
UOTO
U
) that
Undervoltage Lockout
When V
undervoltage lockout (UVLO) condition. During UVLO,
UV is asserted and pulled low while OV is cleared and
blocked from asserting. When V
follows the same timing procedure as an undervoltage
condition on any input.
Shunt Regulator
The LTC2914 has an internal shunt regulator. The V
operates as a direct supply input for voltages up to 6V.
Under this condition, the quiescent current of the device
remains below a maximum of 100µA. For V
higher than 6V, the device operates as a shunt regulator
and must have a resistance R
V
When choosing this resistance value, choose an appropriate
location on the I-V curve shown in the Typical Performance
Characteristics section to accommodate variations in V
due to changes in current through R
UV and OV Output Characteristics
The DC characteristics of the UV and OV pull-up and
pull-down strength are shown in the Typical Performance
Characteristics section. Each pin has a weak internal pull-up
to V
allows these pins to have open-drain behavior while pos-
sessing several other benefi cial characteristics. The weak
pull-up eliminates the need for an external pull-up resistor
when the rise time on the pin is not critical. On the other
hand, the open-drain confi guration allows for wired-OR
connections and is useful when more than one signal
needs to pull down on the output. V
a maximum V
CC
CC
pin to limit the current to no greater than 10mA.
and a strong pull-down to ground. This arrangement
CC
falls below 2V, the LTC2914 asserts an
OL
= 0.15V at UV.
Z
between the supply and the
CC
CC
Z
rises above 2V, UV
.
LTC2914
of 1V guarantees
CC
voltages
11
CC
2914f
pin
CC