LTC2852 Linear Technology, LTC2852 Datasheet - Page 10
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LTC2852
Manufacturer Part Number
LTC2852
Description
3.3V 20Mbps RS485/RS422 Transceivers
Manufacturer
Linear Technology
Datasheet
1.LTC2852.pdf
(16 pages)
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APPLICATIONS INFORMATION
LTC2850/LTC2851/LTC2852
BLOCK DIAGRAM
Driver
The driver provides full RS485/RS422 compatibility. When
enabled, if DI is high, Y-Z is positive for the full-duplex
devices (LTC2851, LTC2852) and A-B is positive for the
half-duplex device (LTC2850).
When the driver is disabled, both outputs are high-im-
pedance. For the full-duplex devices, the leakage on the
driver output pins is guaranteed to be less than 10μA
over the entire common mode range of –7V to 12V. On
the half-duplex LTC2850, the impedance is dominated by
the receiver input resistance, R
Driver Overvoltage and Overcurrent Protection
The driver outputs are protected from short-circuits to
any voltage within the Absolute Maximum range of (V
– 15V) to 15V. The typical peak current in this condition
does not exceed 180mA.
If a high driver output is shorted to a voltage just above
V
voltage exceeds V
off. Preventing the driver from turning off with outputs
shorted to output voltages just above V
10
RO
RE
DE
CC
DI
, a reverse current will fl ow into the supply. When this
SLEEP/SHUTDOWN
LOGIC AND DELAY
DRIVER
RECEIVER
LTC2850
GND
V
CC
CC
by about 1.4V, the reverse current turns
285012 BDa
IN
A
(15kV)
B
(15kV)
.
CC
keeps the driver
RO
DI
DRIVER
RECEIVER
LTC2851
CC
GND
V
CC
active even for receiver loads that have a positive common
mode with respect to the driver – a valid condition.
The worst-case peak reverse short-circuit current can be as
high as 300mA in extreme cold conditions. If this current
can not be absorbed by the supply, a 3.6V zener diode can
be added in parallel with the supply to sink this current.
All devices also feature thermal shutdown protection that
disables the driver and receiver in case of excessive power
dissipation (see Note 4).
Receiver and Failsafe
With the receiver enabled, when the absolute value of the
differential voltage between the A and B pins is greater than
200mV, the state of RO will refl ect the polarity of (A-B).
These parts have a failsafe feature that guarantees the
receiver output to be in a logic-high state when the inputs
are either shorted, left open, or terminated but not driven.
This failsafe feature is guaranteed to work for inputs span-
ning the entire common mode range of –7V to 12V.
The receiver output is internally driven high (to V
low (to ground) with no external pull-up needed. When the
receiver is disabled the RO pin becomes High-Z with leakage
of less than ±1μA for voltages within the supply range.
285012 BDb
A
(15kV)
B
(15kV)
Z
(15kV)
Y
(15kV)
RO
RE
DE
DI
SLEEP/SHUTDOWN
LOGIC AND DELAY
DRIVER
LTC2852
RECEIVER
GND
V
CC
285012 BDc
CC
285012fc
A
(15kV)
B
(15kV)
Z
(15kV)
Y
(15kV)
) or