LTC2497 Linear Technology, LTC2497 Datasheet - Page 14

• Manufacturer Part Number: LTC2497
• Description: 16-Bit 8-/16-Channel ADC
• Manufacturer: Linear Technology

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LTC2497
APPLICATIONS INFORMATION
The LTC2497 has two registers. The output register (24
bits long) contains the last conversion result. The input
register (8 bits long) sets the input channel.
DATA OUTPUT FORMAT
The output register contains the last conversion result.
After each conversion is completed, the device automati-
cally enters the sleep state where the supply current is
reduced to 1µA. When the LTC2497 is addressed for a read
operation, it acknowledges (by pulling SDA low) and acts
as a transmitter. The master/receiver can read up to three
bytes from the LTC2497. After a complete read operation
(3 bytes), a new conversion is initiated. The device will
NAK subsequent read operations while a conversion is
being performed.
The data output stream is 24 bits long and is shifted out
on the falling edges of SCL (see Figure 3a). The fi rst bit
is the conversion result sign bit (SIG) (see Tables 1 and
2). This bit is high if V
corresponds to the selected input signal IN
second bit is the most signifi cant bit (MSB) of the result.
The fi rst two bits (SIG and MSB) can be used to indicate
over and under range conditions (see Table 2). If both bits
14
Table 1. Output Data Format
Differential Input Voltage
V
V
FS** – 1LSB
0.5 • FS**
0.5 • FS** – 1LSB
0
–1LSB
–0.5 • FS**
–0.5 • FS** – 1LSB
–FS**
V
*The differential input voltage V
IN
IN
IN
*
* ≥ FS**
* < –FS**
IN
≥ 0 and low if V
IN
= IN
+
– IN
–
. **The full-scale voltage FS = 0.5 • V
IN
Bit 23
SIG
< 0 (where V
1
1
1
1
1
0
0
0
0
0
+
– IN
Bit 22
–
MSB
). The
1
0
0
0
0
1
1
1
1
0
IN
REF
Bit 21
.
0
1
1
0
0
1
1
0
0
1
are HIGH, the differential input voltage is equal to or above
+FS. If both bits are set low, the input voltage is below
–FS. The function of these bits is summarized in Table
2. The 16 bits following the MSB bit are the conversion
result in binary two’s complement format. The remaining
six bits are always 0.
As long as the voltage on the selected input channels (IN
and IN
maximum operating range) a conversion result is gener-
ated for any differential input voltage V
• V
greater than +FS, the conversion result is clamped to the
value corresponding to +FS. For differential input voltages
below –FS, the conversion result is clamped to the value
–FS – 1LSB.
Table 2. LTC2497 Status Bits
Input Range
V
0V ≤ V
–FS ≤ V
V
IN
IN
REF
≥ FS
< –FS
IN
Bit 20
IN
–
to +FS = 0.5 • V
< FS
) remains between –0.3V and V
0
1
0
1
0
1
0
1
0
1
< 0V
Bit 19
0
1
0
1
0
1
0
1
0
1
REF
…
…
…
…
…
…
…
…
…
…
…
. For differential input voltages
Bit 23
SIG
1
1
0
0
Bit 6
LSB
0
1
0
1
0
1
0
1
0
1
CC
IN
Always 0
+ 0.3V (absolute
from –FS = –0.5
Bits 5-0
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
Bit 22
MSB
1
0
1
0
2497f
+