LTC2487 Linear Technology, LTC2487 Datasheet - Page 28

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LTC2487

Manufacturer Part Number
LTC2487
Description
16-Bit 2-/4-Channel ADC
Manufacturer
Linear Technology
Datasheet

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LTC2487
applicaTions inForMaTion
Using the 2x speed mode of the LTC2487 alters the rejection
characteristics around DC and multiples of f
bypasses the offset calibration in order to increase the out-
put rate. The resulting rejection plots are shown in Figures
26 and 27. 1x type frequency rejection can be achieved
using the 2x mode by performing a running average of the
previous two conversion results (see Figure 28).
Output Data Rate
When using its internal oscillator, the LTC2487 produces
up to 15 samples per second (sps) with a notch frequency of
60Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignificantly short. When
operating with an external conversion clock (F
to an external oscillator), the LTC2487 output data rate
can be increased. The duration of the conversion cycle is
41036/f
as if the internal oscillator is used.
An increase in f
late into a proportional increase in the maximum output
data rate (up to a maximum of 100sps). The increase in

Figure 26. Input Normal Mode Rejection 2x Speed Mode
EOSC
–100
–120
–40
–60
–80
–20
0
. If f
0
EOSC
f
EOSC
N
INPUT SIGNAL FREQUENCY (f
2f
over the nominal 307.2kHz will trans-
N
= 307.2kHz, the converter behaves
3f
N
4f
N
5f
N
6f
N
N
)
7f
N
2487 F26
8f
N
S
O
. The device
connected
output rate leads to degradation in offset, full-scale error
and effective resolution as well as a shift in frequency
rejection. When using the integrated temperature sensor,
the internal oscillator should be used or an external oscil-
lator f
A change in f
internal notch position. This leads to reduced differential
mode rejection of line frequencies. The common mode
rejection of line frequencies remains unchanged, thus fully
differential input signals with a high degree of symmetry
on both the IN
frequency noise.
An increase in f
input and reference current. External RC networks will
continue to have zero differential input current, but the
time required for complete settling (580ns for f
307.2kHz) is reduced, proportionally.
Once the external oscillator frequency is increased above
1MHz (a more than 3x increase in output rate) the effective-
ness of internal auto calibration circuits begins to degrade.
This results in larger offset errors, full-scale errors, and
decreased resolution, as seen in Figures 29 to 36.
Figure 27. Input Normal Mode Rejection 2x Speed Mode
EOSC
–100
–120
–40
–60
–20
–80
= 307.2kHz maximum.
0
248
EOSC
+
EOSC
250
and IN
INPUT SIGNAL FREQUENCY (f
results in a proportional change in the
252 254 256 258 260 262 264
also increases the effective dynamic
pins will continue to reject line
N
)
2487 F27
EOSC
2487fa
=

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