LTC2309 Linear Technology Corporation, LTC2309 Datasheet - Page 15

• Manufacturer Part Number: LTC2309
• Description: 12-Bit SAR ADC
• Manufacturer: Linear Technology Corporation

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After power-up, the ADC initiates an internal reset
cycle which sets the D
S0 = S1 = UNI = SLP = 0). A write operation may be
performed if the default state of the ADC’s confi guration
is not desired. Otherwise, the ADC must be properly
addressed and followed by a Stop condition to initiate
a conversion.
Initiating a New Conversion
The LTC2309 awakens from either nap or sleep when
properly addressed for a read/write operation. A Stop
command may then be issued after performing the
read/write operation to trigger a new conversion.
Issuing a Stop command after the 8th SCL clock pulse
of the address frame and before the completion of a
read/write operation will also initiate new conversion,
but the output result may not be valid due to lack of
adequate acquisition time (see Acquisition section).
LTC2309 Address
The LTC2309 has two address pins (AD0 and AD1) that
may be tied high, low, or left fl oating to enable one of
9 possible addresses (see Table 2).
In addition to the confi gurable addresses listed in
Table 2, the LTC2309 also contains a global address
(1110111) which may be used for synchronizing mul-
tiple LTC2309s or other I
Synchronizing Multiple LTC2309s with Global Address
Call section).
APPLICATIONS INFORMATION
CONVERSION
S
7-BIT ADDRESS
NAP
IN
2
word to all 0s (S/D = O/S =
C LTC230X SAR ADCs (see
R ACK READ
DATA OUTPUT
Figure 9. Consecutive Reading with the Same Confi guration
P
CONVERSION
Continuous Read
In applications where the same input channel is sampled
each cycle, conversions can be continuously performed
and read without a write cycle (see Figure 9). The D
word remains unchanged from the last value written
into the device. If the device has not been written to
since power-up, the D
O/S = S0 = S1 = UNI = SLP = 0). At the end of a read
operation, a Stop condition may be given to start a new
conversion. At the conclusion of the conversion cycle,
the next result may be read using the method described
above. If the conversion cycle is not concluded and a
valid address selects the device, the LTC2309 gener-
ates a NAK signal indicating the conversion cycle is in
progress.
Table 2. Address Assignment
S
7-BIT ADDRESS
FLOAT
FLOAT
FLOAT
HIGH
HIGH
HIGH
LOW
LOW
LOW
AD1
NAP
IN
R ACK
word defaults to all 0s (S/D =
FLOAT
FLOAT
FLOAT
HIGH
HIGH
HIGH
LOW
LOW
LOW
AD0
OUTPUT
DATA
READ
LTC2309
CONVERSION
P
ADDRESS
0001000
0001001
0001010
0001011
0011000
0011001
0011010
0011011
0101000
15
2309f
2309 F09
IN