LTC1650 Linear Technology, LTC1650 Datasheet - Page 7

• Manufacturer Part Number: LTC1650
• Description: Low Glitch 16-Bit Voltage Output DAC
• Manufacturer: Linear Technology

PIN
CLK (Pin 7): The TTL Level Input for the Serial Interface
Clock.
CS/LD (Pin 8): The TTL Level Input for the Serial Interface
Enable and Load Control. When CS/LD is low, the CLK
signal is enabled so the data can be clocked in. When
CS/LD is pulled high, data is loaded from the shift register
into the DAC register, updating the DAC output.
CLR (Pin 9): The DAC is cleared to V
pulled low. It should be logic high for normal operation.
RSTOUT (Pin 10): The logic output pin that goes active
when any of the supplies drop below 2.5V. This pin is
active low.
TI I G DIAGRA
W
U
FUNCTIONS
U
U
U
W
CS/LD
D
CLK
OUT
D
IN
(PREVIOUS
RST
WORD)
B15
when this pin is
t
1
MSB
B15
t
9
t
2
t
B14
8
B14
B13
t
4
B13
REFHI (Pin 11): The Reference Input Pin. The DAC is
capable of 4-quadrant multiplying; this pin can swing
from 4.5V to – 4V.
REFLO F/REFLO S (Pins 12, 13): The Force and Sense Pin
for the Lower Reference Input. This should nominally be
tied to ground. This pin can swing from – 1V to 1V.
AV
AV
UNI/BIP (Pin 16): The Unipolar/Bipolar Selection Pin. For
unipolar operation, tie this pin to V
operation, tie this pin the REFHI.
AV
AV
SS
DD
B1
SS
DD
(Pin 14): The Analog Negative Supply Input. – 5.25V
(Pin 15): The Analog Positive Supply Input. 4.75V
B1
t
3
– 4.75V. Requires a bypass capacitor to ground.
5.25V. Requires a bypass capacitor to ground.
B0
t
6
LSB
B0
t
5
t
7
1650 TD
OUT
LTC1650
and for bipolar
7