LTC1599 Linear Technology, LTC1599 Datasheet
LTC1599
Available stocks
Related parts for LTC1599
LTC1599 Summary of contents
Page 1
... The device includes an internal deglitcher circuit that reduces the glitch impulse to 1.5nV-s (typ). The asyn- chronous CLR pin resets the LTC1599 to zero scale when the CLVL pin logic low and to midscale when the CLVL pin logic high. ...
Page 2
... I to DGND .... – 0.3V to( V OUT1 OUT2F OUT2S Maximum Junction Temperature .......................... 125 C Operating Temperature Range LTC1599C ............................................... LTC1599I ............................................ – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................. 300 C ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are unless otherwise noted ...
Page 3
... R = 600 . Unipolar mode op amp = LT1468. L Note 11: Calculation from e (J/ K resistance ( ), T = temperature ( K bandwidth (Hz). Note 12: Midscale transition code 0111 1111 1111 1111 to 1000 0000 0000 0000. Note 13: R1 and R2 are measured between R1 and R LTC1599 = DGND = 0V, OUT1 OUT2F OUT2S MIN TYP ...
Page 4
... LTC1599 W U TYPICAL PERFOR A CE CHARACTERISTICS Midscale Glitch Impulse 40 USING AN LT1468 C = 30pF 30 FEEDBACK V = 10V REF 1.5nV-s TYPICAL –10 –20 – 30 – 0.2 0.4 0.6 0.8 1.0 TIME ( s) 1599 G01 Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Zeros – USING TWO LT1468s ...
Page 5
... G13 Differential Nonlinearity vs Suppy Voltage in Unipolar Mode 1.0 0.8 0.6 0 10V REF 0 2.5V REF 0 – 0.2 – 0.4 – 0.6 – 0.8 –1 1599 G15 LTC1599 Differential Nonlinearity vs Reference Voltage in Unipolar Mode 1.0 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 –1 –10 – 8 – 6 – 4 – REFERENCE VOLTAGE (V) ...
Page 6
... D14 D14 D14 CODES FROM D14 MIDSCALE D14 ZERO SCALE D14 D14 D14 D15 ON 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 1599 G20 + LT1468 – V OUT 12pF 15pF – LTC1599 LT1468 ...
Page 7
... When CLR and CLVL are taken to a logic low, the DAC output and all internal registers are set to zero code. When CLR is taken to a logic low and CLVL is taken to a logic high, the DAC output and all internal registers are set to midscale code. LTC1599 5.5V ...
Page 8
... LTC1599 W BLOCK DIAGRA REF 48k 48k 12k R 3 COM 12k MSB ENABLE WR 12 BYTE ENABLE LSB ENABLE LOGIC MLBYTE DIAGRA t BWH MLBYTE t BWS CLR 8 48k 48k 48k 48k ...
Page 9
... Updating the DAC register updates the DAC output with the new data. The deglitcher is activated on the falling edge of the LD pin. The asynchronous clear pin resets the LTC1599 to zero scale when the CLVL pin logic low level and to midscale when the CLVL pin is at and a logic high level ...
Page 10
... B1 B1 REF A 10k/A VOL1 VOL V (mV) 0 OS2 I (nA VOL2 Table 4. Partial List of LTC Precision Amplifiers Recommended for Use with the LTC1599, with Relevant Specifications AMPLIFIER V nA V/mV LT1001 25 2 800 LT1097 50 0.35 1000 LT1112 (Dual) 60 ...
Page 11
... LSB 1111 1111 1111 1111 V (65,535/65,536) REF 1000 0000 0000 0000 V (32,768/65,536 REF 0000 0000 0001 0000 V (1/65,536) REF 0000 0000 0000 0000 0V LTC1599 33pF 7 2 – OUT LT1001 0V TO –V REF OUT / 2 REF 1599 F01 = 0V to – ...
Page 12
... Figure 3. Bipolar Operation (4-Quadrant Multiplication) V Precision Voltage Reference Considerations Much in the same way selecting an operational amplifier for use with the LTC1599 is critical to the performance of the system, selecting a precision voltage reference also requires due diligence. As shown in the section describing the basic operation of the LTC1599, the output voltage of the DAC circuit is directly affected by the voltage reference ...
Page 13
... P-P The circuit in Figure 5 provides an output to a current loop 3 V P-P controlled by an LTC1599, a 16-bit current output DAC. A dual rail-to-rail op amp (U1, LT1366) controls a P-channel 20 V P-P power FET (Q2) to produce a current mirror with a precise 8:1 ratio as defined by a resistor array. The input current to this mirror circuit is produced by a grounded base cascode stage using a high gain transistor (Q1) ...
Page 14
... N1 maintained the action of U1B. In applications that do not require 16-bit resolution and accuracy, the LTC1599 can be replaced by the 14-bit parallel LTC1591. Furthermore, the resistor array can be substituted with discrete resistors, and Q2 could be re- placed by a high gain bipolar PNP; for example, an FZT600 from Zetex ...
Page 15
... When active, switch D places R parallel with R , producing an output at full scale voltage FB equal to the voltage at the REF pin of the LTC1599. The other switches and B) are used to select the 10V reference produced by the LT1019 produced by the R3 and R4 divider. An inexpensive precision divider can be implemented using an 8-element resistor array, paralleling four resis- tors for R3 and four resistors for R4 ...
Page 16
... LTC1599 U U APPLICATIONS INFORMATION ...
Page 17
... LTC1599 16-bit current output * DAC. Port B at $1004 is used for two eight bit transfers. Port A, * bit 3 is used for the LTC1599’s WR command and bit 4 is used for the * MLBYTE command. Port D’ SS output is used for the LTC1599’s LD ...
Page 18
... This sets PORTA, Bit4 output to a logic high, forcing MLBYTE to a logic high Retrieve the most significant byte from memory This forces a low on the LTC1599’s WR pin Transfer the most significant byte to the DAC This forces a high on the LTC1599’s WR pin ...
Page 19
... U Dimensions in inches (millimeters) unless otherwise noted. G Package 24-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 1.73 – 1.99 (0.068 – 0.078) 0 – 8 0.65 (0.0256) BSC 0.05 – 0.21 0.25 – 0.38 (0.002 – 0.008) (0.010 – 0.015) LTC1599 15pF OUT1 7 2 – 6 LT1468 I 3 OUT2F ...
Page 20
... REF V R COM CC OFS LTC1599 DATA CLR CLVL DGND CLR U Dimensions in inches (millimeters) unless otherwise noted. N Package 24-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.065 0.255 0.015* (1.651) (6 ...