LTC1502-3.3 Linear Technology, LTC1502-3.3 Datasheet - Page 6

• Manufacturer Part Number: LTC1502-3.3
• Description: Single Cell to 3.3V Regulated Charge Pump DC/DC Converter
• Manufacturer: Linear Technology

APPLICATIONS
LTC1502-3.3
will force a logic high on the C1
back into active mode. If no external pull-down is present
during the Hi-Z interval, the internal pull-up current will
maintain a logic high on the C1
ing the part in active mode.
The shutdown feature can be used to prevent charge pump
switching during noise sensitive intervals. Since the charge
pump oscillator is disabled during shutdown, output switch-
ing noise can be eliminated while the external pull-down is
active. The LTC1502-3.3 takes between 20 s and 50 s to
switch from shutdown to active mode once the pull-down
device has been turned off (assuming a 100pF external
capacitance to GND on the C1
resistor from V
by a factor of five at the expense of 10 A or so of additional
shutdown current. To maintain regulation, a sufficiently
large output capacitor must be used to prevent excessive
V
there must be adequate time for the charge pump to
recharge the output capacitor while the part is active. In
other words, the average load current must be low enough
for the LTC1502-3.3 to maintain a 3.3V output while the
part is active.
Capacitor Selection
For best performance, it is recommended that low ESR
capacitors be used for C
and ripple. The C
either ceramic or tantalum and should be 10 F or greater.
If the input source impedance is very low (< 0.5 ), C
may not be needed. Ceramic capacitors are recommended
for the flying capacitors C1 and C3 with values of 0.47 F
to 2.2 F. Smaller values may be used in low output current
applications (e.g., I
6
OUT
ON OFF
droop while the charge pump is in shutdown. Also,
Figure 1. Pull-Down Circuitry for Shutdown
V
CTRL
100
IN
to C1
IN
U
OUT
, C2 and C
–
/SHDN will speed up this transition
< 1mA).
IN
INFORMATION
U
, C2 and C
1
2
3
4
–
–
/SHDN pin). A 100k pull-up
/SHDN pin and put the part
–
OUT
C2
C1
C1
GND
/SHDN pin thereby keep-
LTC1502-3.3
+
–
/SHDN
W
capacitors should be
OUT
V
C3
OUT
C3
V
IN
+
–
to reduce noise
8
7
6
5
U
10 F
1502-3.3 F01
IN
Output Ripple
Normal LTC1502-3.3 operation produces voltage ripple
on the V
regulation. Low frequency ripple exists due to the hyster-
esis in the sense comparator and propagation
delays in the charge pump enable/disable circuits. High
frequency ripple is also present mainly from the ESR
(equivalent series resistance) in the output capacitor. Typi-
cal output ripple (V
50mV peak-to-peak with a low ESR 10 F output capacitor.
The magnitude of the ripple voltage depends on several
factors. High input voltages increase the output ripple
since more charge is delivered to C
Large output current load and/or a small output capacitor
(<10 F) results in higher ripple due to higher output
voltage dV/dt. High ESR capacitors (ESR > 0.5 ) on the
output pin cause high frequency voltage spikes on V
with every clock cycle.
There are several ways to reduce the output voltage ripple.
A larger C
the low and high frequency ripple due to the lower C
charging and discharging dV/dt and the lower ESR typi-
cally found with higher value (larger case size) capacitors.
A low ESR ceramic output capacitor will minimize the high
frequency ripple, but will not reduce the low frequency
ripple unless a high capacitance value is chosen. A reason-
able compromise is to use a 10 F to 22 F tantalum
capacitor in parallel with a 1 F to 3.3 F ceramic capacitor
on V
An RC filter may also be used to reduce high frequency
voltage spikes (see Figure 2).
OUT
Figure 2. Output Ripple Reduction Techniques
to reduce both the low and high frequency ripple.
OUT
OUT
LTC1502-3.3
LTC1502-3.3
capacitor (22 F or greater) will reduce both
pin. Output voltage ripple is required for
V
V
OUT
OUT
8
8
IN
+
+
= 1.25V) under maximum load is
10 F
10 F
TANTALUM
2
+
OUT
10 F
1 F
CERAMIC
per charging cycle.
1502-3.3 F02
V
V
OUT
OUT
OUT
OUT