LTC1286 Linear Technology, LTC1286 Datasheet - Page 13

• Manufacturer Part Number: LTC1286
• Description: Micropower Sampling 12-Bit A/D Converters In S0-8 Packages
• Manufacturer: Linear Technology

Shutdown
The LTC1286/LTC1298 are equipped with automatic shut-
down features. They draw power when the CS pin is low
and shut down completely when that pin is high. The bias
circuit and comparator powers down and the reference
APPLICATION INFORMATION
ACHIEVING MICROPOWER PERFORMANCE
With typical operating currents of 250 A and automatic
shutdown between conversions, the LTC1286/LTC1298
achieves extremely low power consumption over a wide
range of sample rates (see Figure 4). The auto-shutdown
allows the supply curve to drop with reduced sample rate.
Several things must be taken into account to achieve such
a low power consumption.
DATA (D
Figure 4. Automatic Power Shutdown Between Conversions
Allows Power Consumption to Drop with Sample Rate.
IN
/D
CLK
OUT
CS
1000
100
)
10
1
0.1k
T
V
f
CLK
A
CC
= 25°C
= V
LTC1298
= 200kHz
U
REF
SAMPLE RATE (kHz)
1k
= 5V
U
LTC1286
MPU CONTROLS DATA LINE AND SENDS
START
MUX ADDRESS TO LTC1298
Figure 3. LTC1298 Operation with D
10k
1
W
LT1286/98 G03
SGL/DIFF
AND BEFORE THE 4TH FALLING CLK
DATA LINE AFTER 4TH RISING CLK
100k
2
PROCESSOR MUST RELEASE
U
ODD/SIGN
3
MSBF BIT LATCHED
input becomes high impedance at the end of each conver-
sion leaving the CLK running to clock out the LSB first data
or zeroes (see Figures 1 and 2). If the CS is not running rail-
to-rail, the input logic buffer will draw current. This current
may be large compared to the typical supply current. To
obtain the lowest supply current, bring the CS pin to
ground when it is low and to supply voltage when it is high.
When the CS pin is high (= supply voltage), the converter
is in shutdown mode and draws only leakage current. The
status of the D
current during this time. There is no need to stop D
CLK with CS = high; they can continue to run without
drawing current.
Minimize CS Low Time
In systems that have significant time between conver-
sions, lowest power drain will occur with the minimum CS
low time. Bringing CS low, transferring data as quickly as
possible, and then bringing it back high will result in the
lowest current drain. This minimizes the amount of time
the device draws power. After a conversion the ADC
automatically shuts down even if CS is held low (see
Figures 1 and 2). If the clock is left running to clock out
LSB-data or zero, the logic will draw a small current.
Figure 5 shows that the typical supply current with CS =
ground varies from 1 A at 1kHz to 35 A at 200kHz. When
CS = V
drawn regardless of the clock frequency.
BY LTC1298
IN
MSBF
and D
4
CC
OUT
, the logic is gated off and no supply current is
Tied Together
LTC1298 TAKES CONTROL OF DATA LINE
ON 4TH FALLING CLK
IN
LTC1298 CONTROLS DATA LINE AND SENDS
and CLK input have no effect on supply
A/D RESULT BACK TO MPU
LTC1286/LTC1298
B11
B10
• • •
LTC1286/98 F03
13
IN
and