LT1977 Linear Technology, LT1977 Datasheet - Page 18

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LT1977

Manufacturer Part Number
LT1977
Description
Step-Down Switching Regulator
Manufacturer
Linear Technology
Datasheet

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LT1977
APPLICATIO S I FOR ATIO
In addition to the shutdown feature, the LT1977 has an
undervoltage lockout function. When the input voltage is
below 2.4V, switching will be disabled. The undervoltage
lockout threshold doesn’t have any hysteresis and is
mainly used to insure that all internal voltages are at the
correct level before switching is enabled. If an undervolt-
age lockout function with hysteresis is needed to limit
input current at low V
the following:
R1 should be chosen to minimize quiescent current during
normal operation by the following equation:
Example:
See the Typical Performance Characteristics section for
graphs of SHDN and V
SYNCHRONIZING
Oscillator synchronization to an external input is achieved
by connecting a TTL logic-compatible square wave with a
duty cycle between 30% and 70% to the LT1977 SYNC
pin. The synchronizing range is equal to initial operating
frequency up to 700kHz. This means that minimum
practical sync frequency is equal to the worst-case high
18
R
R
R
R2 =
V
V
UVLO
HYST
1
1
3
=
=
=
=
( )
1 5 5
1.3M
408
5 1 3
7 – 1.3
1 5
.
12 2
=
=
(
.
(
R
.
V
k
V
(
1
1
OUT
µ
I
M
IN
(Nearest 1% 412k)
SHDN MAX
A
R
V
)
3
SHDN
( )
R
)
R
2
=
1
U
3
(
1.3
µ
1
=
V
1 3
IN
A
.
6 5
IN
to V
.
+
M
)
M
)
currents versus input voltage.
6 49
U
V
.
OUT
SHDN
R
1 3
2
.
(Nearest 1% 6.49M )
M
ratios refer to Figure 8 and
+
I
W
SHDN
⎟ +
V
SHDN
U
V
self-oscillating frequency (575kHz), not the typical oper-
ating frequency of 500kHz. Caution should be used when
synchronizing above 575kHz because at higher sync
frequencies the amplitude of the internal slope compen-
sation used to prevent subharmonic switching is re-
duced. This type of subharmonic switching only occurs at
input voltages less than twice output voltage. Higher
inductor values will tend to eliminate this problem. See
Frequency Compensation section for a discussion of an
entirely different cause of subharmonic switching before
assuming that the cause is insufficient slope compensa-
tion. Application Note 19 has more details on the theory
of slope compensation.
If the FB pin voltage is below 0.9V (power-up or output
short-circuit conditions) the sync function is disabled.
This allows the frequency foldback to operate to avoid any
hazardous conditions for the SW pin.
If no synchronization is required this pin should be con-
nected to ground.
POWER GOOD
The LT1977 contains a power good block which consists
of a comparator, delay timer and active low flag that allows
the user to generate a delayed signal after the power good
threshold is exceeded.
Referring to Figure 2, the PGFB pin is the positive input to
a comparator whose negative input is set at V
PGFB is taken above V
the C
OUT
T
R3
pin starting the delay period. When the voltage on
R1
R2
15
4
LT1977
V
SHDN
Figure 8. Undervoltage Lockout
IN
3µA
2.4V
1.3V
PGFB
+
+
, current (I
COMP
COMP
SHDN
V
IN
CSS
) is sourced into
PGFB
ENABLE
. When
1977 F08
1977f

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