LT1122 Linear Technology, LT1122 Datasheet - Page 7

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LT1122

Manufacturer Part Number
LT1122
Description
Fast Settling/ JFET Input Operational Amplifier
Manufacturer
Linear Technology
Datasheet

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Settling Time Measurements
Settling time test circuits shown on some competitive
devices’ data sheets require:
1. A “flat top” pulse generator. Unfortunately, flat top
2. A variable feedback capacitor around the device under
3. A small inductor load to optimize settling.
The LT1122’s settling time is 100% tested in the test
circuit shown. No “flat top” pulse generator is required.
The test circuit can be readily constructed, using commer-
cially available ICs. Of course, standard high frequency
board construction techniques should be followed. All
LT1122s are measured with a constant feedback capaci-
tor. No fine tuning is required.
Speed Boost/Overcompensation Terminal
Pin 8 of the LT1122 can be used to change the input stage
operating current of the device. Shorting pin 8 to the
positive supply (Pin 7) increases slew rate and bandwidth
by about 25%, but at the expense of a reduction in phase
margin by approximately 18 degrees. Unity gain capaci-
tive load handling decreases from typically 500pF to
100pF.
Conversely, connecting a 15k resistor from pin 8 to
ground pulls 1mA out of pin 8 (with V
reduces slew rate and bandwidth by 25%. Phase margin
and capacitive load handling improve; the latter typically
increasing to 800pF.
High Speed Operation
As with most high speed amplifiers, care should be taken
with supply decoupling, lead dress and component
placement.
A
PPLICATI
pulse generators are not commercially available.
test. This capacitor varies over a four to one range.
Presumably, as each op amp is measured for settling
time, the capacitor is fine tuned to optimize settling
time for that particular device.
O
U
S
I FOR ATIO
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
W
+
= 15V). This
U
The power supply connections to the LT1122 must main-
tain a low impedance to ground over a bandwidth of
20MHz. This is especially important when driving a signifi-
cant resistive or capacitive load, since all current delivered
to the load comes from the power supplies. Multiple high
quality bypass capacitors are recommended for each
power supply line in any critical application. A 0.1 F
ceramic and a 1 F electrolytic capacitor, as shown, placed
as close as possible to the amplifier (with short lead
lengths to power supply common) will assure adequate
high frequency bypassing, in most applications.
When the feedback around the op amp is resistive (R
pole will be created with R
capacitance (R
(C
with R
excess phase shift and even oscillation. A small capacitor
(C
R
completely removed.
S
IN
F
) in parallel with R
(C
S
S
4pF). In low closed loop gain configurations and
+ C
R
and R
S
IN
) = R
F
S
2
3
, C
in the kilohm range, this pole can create
C
S
+
F
S
C
LT1122
), and the amplifier input capacitance
7
4
F
V +
V –
, the effect of the feedback pole is
F
eliminates this problem. With
+
+
+
F,
6
R
1 F
C
1 F
the source resistance and
F
F
C
IN
0.1 F
0.1 F
LT1122•TA04
LT1122
LT1122•TA03
OUTPUT
7
F
), a

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