IR3Y38M Sharp Electrionic Components, IR3Y38M Datasheet - Page 9

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IR3Y38M

Manufacturer Part Number
IR3Y38M
Description
CCD Signal Process & Digital Interface IC
Manufacturer
Sharp Electrionic Components
Datasheet

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Serial Interface Circuit
The IR3Y38M has a serial interface to control the
gain of the AGC amplifier and the offset of the
blanking level. This interface is constituted by a shift
register for serial-parallel conversion, data registers
and D/A converters.
The data input to SDATA is fetched and shifted at
DATA REGISTER
SDATA
SCK
(Don't care)
AGC GAIN
GAIN SEL
OFFSET
SDATA
SCK
Register
Selector
43.5
Store
Gain
3-bit
22
12
0
Shift Register
Dummy
Value of AGC GAIN
Cycle
LSB
D/A Converter
D
d
AGC GAIN
0
9
Register
D
D
3.3 µs min.
8-bit
8-bit
2
9
-D
9
D
d
D
1
8
D
D
8
0
1
D/A Converter
OFFSET
Decoder
Register
D
255
D
6-bit
d
d
6-bit
7
2
0
7
Select
D
6
D
d
d
3
1
6
9
D
5
the rising edge of the SCK. While transmitting data,
the SDATA must be low when the SCK falls. When
the SDATA is high and the SCK falls, the data on
the shift register is stored at the selected data
register at the following falling edge of the SDATA.
The stored data register is selected by the data of
the D
D
d
d
4
2
5
0
D
4
and D
GAIN SEL
–75
65
D
d
d
d
0
1
2
3
4
5
6
7
0
0
5
3
D
4
1
3
bits.
Value of OFFSET
D
D
d
d
d
2
1
6
4
3
MSB
D
1
MAXIMUM GAIN (dB)
D
d
d
d
2
7
5
2
D
0
31.5
34.5
43.5
D
22
25
28
38
41
Store
0
0
1
1
1
63
IR3Y38M
D
0
1
0
1
0

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