ADN8810 Analog Devices, ADN8810 Datasheet - Page 5

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ADN8810

Manufacturer Part Number
ADN8810
Description
12-Bit High Output Current Source
Manufacturer
Analog Devices
Datasheet

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TIMING CHARACTERISTICS
Table 2. Timing Characteristics
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
t
NOTES
1
2
Guaranteed by design. Not production tested.
Sample tested during initial release and after any redesign or process change that may affect these parameters. All input signals are measured with tr = tf = 5 ns (10%
CLK
1
2
3
4
5
6
7
8
9
10
11
12
to 90% of DVDD) and timed from a voltage level of (V
RESET
SCLK
SDI
C S
t
10
t
6
Description
SCLK Frequency
SCLK Cycle Time
SCLK Width High
SCLK Width Low
CS Low to SCLK High Setup
CS High to SCLK High Setup
SCLK High to CS Low Hold
SCLK High to CS High Hold
Data Setup
Data Hold
CS High Pulsewidth
RESET Pulsewidth
CS High to RESET Low Hold
t
t
8
4
A3*
* ADDRESS BIT A3 MUST BE LOGIC LOW
t
9
A2
1, 2
IL
+ V
IH
)/2.
A1
t
3
Figure 2. Timing Diagram
A0
Rev. 0 | Page 5 of 16
t
D11
1
t
2
D10
Min
80
40
40
15
15
35
20
15
2
30
40
30
Typ
D0
t
7
t
5
t
12
Max
12.5
t
11
ADN8810
ns
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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