AD5273 Analog Devices, AD5273 Datasheet - Page 15

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AD5273

Manufacturer Part Number
AD5273
Description
64-Position OTP Digital Potentiometer
Manufacturer
Analog Devices
Datasheet

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I
Write Bit Pattern Illustrations
Read Bit Pattern Illustration
CONTROLLING TWO DEVICES ON ONE BUS
Figure 12 shows two AD5273 devices on the same serial bus.
Each has a different slave address since the state of each AD0
pin is different. This allows each device to operate independently.
The master device output bus line drivers are open-drain pull
downs in a fully I
APPLICATIONS
Programmable Voltage Reference
For Voltage Divider mode operation, as shown in Figure 13, it is
common to buffer the output of the digital potentiometer unless
the load is much larger than R
the purpose of impedance conversion, it also allows a heavier
load to be driven.
REV. 0
2
C Controller Programming
START BY
START BY
MASTER
MASTER
Figure 12. Two AD5273 Devices on One Bus
SCL
SDA
SCL
SDA
MASTER
2
C compatible interface.
0
0
0
0
1
1
START BY
SLAVE ADDRESS BYTE
SLAVE ADDRESS BYTE
MASTER
AD0
AD5273
SDA SCL
0
0
SCL
SDA
FRAME 1
FRAME 1
WB
1
1
Rp
. Not only does the buffer serve
1
1
0
0
5V
0
0
Rp
1
AD0
AD5273
SDA SCL
AD0 R/
Figure 11. Reading Data From the RDAC Register
AD0 R/
SLAVE ADDRESS BYTE
Figure 10b. Activating One Time Programming
5V
0
Figure 10a. Writing to the RDAC Register
ACK. BY
FRAME 1
ACK. BY
AD5273
AD5273
1
8
8
SDA
SCL
1
0
1
0
0
0
X
X
AD0
X
X
INSTRUCTION BYTE
INSTRUCTION BYTE
R/
ACK. BY
AD5273
X
X
–15–
FRAME 2
FRAME 2
8
X
X
Programmable Voltage Source with Boosted Output
For applications that require high current adjustment such as a
laser diode driver or tunable laser, a boosted voltage source can
be considered. See Figure 14.
In this circuit, the inverting input of the op amp forces the V
to be equal to the wiper voltage set by the digital potentiometer.
The load current is then delivered by the supply via the N-Ch
E1
0
X
X
E0
DATA BYTE FROM SELECTED
Figure 14. Programmable Booster Voltage Source
X
X
D5
Figure 13. Programmable Voltage Reference
AD5273
RDAC REGISTER
X
X
U1
D4
ACK. BY
FRAME 2
ACK. BY
AD5273
AD5273
8
V
8
IN
D3
2
B
A
1
GND
V
5V
0
X
IN
0
X
U1
D2
ADR03
W
V
X
X
OUT
AD8601
D1 D0
D5
D5
3
+V
U2
–V
NO ACK. BY
AD5273
D4
D4
MASTER
DATA BYTE
DATA BYTE
FRAME 1
FRAME 1
U3 2N7002
U3
8
A W
B
D3
D3
STOP BY
MASTER
AD8601
D2
D2
5V
SIGNAL
D1
D1
U2
LD
C
D0
D0
C
ACK. BY
ACK. BY
AD5273
AD5273
V
R
AD5273
8
8
O
V
BIAS
OUT
I
L
STOP BY
MASTER
STOP BY
MASTER
OUT

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